<heat>
if you wrote a strongly worded email you'd be the big stupid
<heat>
"this hardening I enabled makes things slower"
<mjg>
*i* did not enable it
<mjg>
and i'm confident zeroing for these bufs was not intended
<heat>
you did enable it when you installed your ubuntu kernel
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<heat>
why was it not?
<heat>
it was intended for everything that could be zeroed
<mjg>
dude
<mjg>
you are worse than theo
<ZombieChicken>
Is there an actual issue here?
<heat>
no
<heat>
mjg doesn't understand the concept of hardening
<mjg>
i think it got hardened in the sense that it avoids copying out unitinit kernel memory
<mjg>
if the consumer failed to take care of it
<mjg>
what you don't understand is that the namei zone does not have this problem
<heat>
why does it not?
<mjg>
memory is copied *in* and only inspected up to that spot
<heat>
not just copying out uninit but just plain using it too
* ZombieChicken
thinks he enabled zeroing on freeing and allocation for some reason
<mjg>
again, the kernel de facto performs strncpy + guarantees nul termination
<mjg>
and remembers the size
<heat>
mjg, sounds great until someone fucks up and overwrites your \0 and then boom
<heat>
but this is obviously not a problem because an off by 1 bug never happens
<mjg>
you do realize if this is indeed to be considered a problem
<mjg>
the strncpy routine can just zero out few more bytes
<mjg>
that is still going to be quite a bit less than 4096
<heat>
do you want to create a whole weird dubious workaround just to get a +25% speed boost on a synthetic benchmark
<heat>
for a config option you need to explicitly enable
<ZombieChicken>
2.5 -> 2 is 20% improvement
<mjg>
i don't see anything dubious when it comes to not zeroing for *this* cache
<mjg>
ZombieChicken: it is 2 -> 2.5
<ZombieChicken>
eh
<mjg>
well i'm gonna ask powers to be what they think
<heat>
sure, you can pad your string for a few bytes
<mjg>
(or is it powers that be?0
<heat>
for $arbitrary
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<geist>
i do wonder if there's some tiny advantage to when copying a variable sized string or whatnot, zeroing *up to a cache line boundary* on the output
<geist>
reason being: the cpu can optimize out a readback of the cache line if it senses a complete overwrite
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<moon-child>
azul machines had specialised instructions for this
<moon-child>
on x86, however, I think the only non-allocating writes you get are nt stores. Not 100% sure of that, though
<moon-child>
may be extra complexity for not-nt for tso reasons. I believe the azul instructions were weakly ordered, as they were intended for nursery allocations, which of course no one is going to snoop
<geist>
well i'm not necessarily saying its NT, it it does't skip the cache, but if the cpu gets a write that is going to cover the entire cache line it can avoid reading in a copy of it first
<geist>
then it can write it back when it feels like it
<geist>
i'd be surprised if modern cpus dont already have this optimization
<moon-child>
yes, I understand. I'm saying that ideally, non-allocating would be separate from nt, but I think you have to pick either both or neither on x86
<zid>
It's weird to me how many things x86 leaves to the cpu to optimize rather than just letting you do
<geist>
well im also thinking about not x86 too
<moon-child>
zid: cldemote is maybe a thing soon
<zid>
x86 seemingly cares about perf and isn't afraid to add instructions
<geist>
and what i'm thinking about isn't non allocating either. it's fully allocating
<bslsk05>
sites.utexas.edu: John McCalpin's blog » Blog Archive » Notes on “non-temporal” (aka “streaming”) stores
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<moon-child>
'"Non-allocating store" says that a store that misses in a cache will not load the corresponding cache line into the cache before performing the store'
<geist>
ah. huh. that seems incorrect terminology, but maybe thats' because i'm using to ARM terminology where 'allocating' has very specific semantics
<moon-child>
vs '"Cache-bypassing store" says that at least some aspects of the transaction bypass the cache(s)' which seems to be what you're referring to
<moon-child>
ah, I see; idk arm
<geist>
but yeah that's precisely what i'm talking about. ARM goes into some amount of verbiage about how their write buffer works, etc, so it implies it can easily implement this sort of optimization
<geist>
no i'm thinking 100% about what they describe as non-allocating
<geist>
obviously if the cache line already exists it can overwrite it, but if there's no cache line in the heirarchy for that address it can just synthesize a new one, mark it dirty, without having to fetch the old contents first
<moon-child>
I meant, when I said 'non-allocating', you interpreted that to mean what john mccalpin refers to as 'cache-bypassing'
<moon-child>
anyway yeah wc can do that
<moon-child>
(or if you have a full-cacheline write, which you get with avx512)
<geist>
also note ARM (and AMD) have instructions to blat out a cache line of zeros, but i think those are pretty specifically NT
<moon-child>
yeah I thought amd clzero was specifically for wiping out ecc errors or something; not for performance
<geist>
iirc ARM also has a special type of AXI transaction that says 'this is just zeros' and then doesn't have to clock in N bytes of zeros
<geist>
presumably x86 does too inside their private busses. seems like an easy optimizatino to make
<moon-child>
yeah I saw a thing about that somewhere
<moon-child>
writing zeroes can be cheaper than writing other stuff
<geist>
anyway seems like it'd be an easy enough benchmark to write: blat out soe data to some large buffer, sometimes completely covering the cache line and sometimes leaving one word out, etc
<geist>
hypothetically the one that blats out less data should be faster, because less data, but if it has to allocate the cache line first..
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<moon-child>
yeah
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<epony>
so, Rust having the dancing baffoonery around data and logic is the same overhead as Java
<epony>
and runs on a VM compiler
<epony>
therefore, it produces overhead and waste, without assuring validity and correctness of logic and data manipulation
<epony>
and runs on microprocessors without isolation of resources
<epony>
"faux intruments"
<epony>
untruements
<epony>
have to present pinchmarks to validated and verified logic and data structure programs for real security and correctness
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<epony>
and compare that with native performance punchmarks of having done that ahead of compilation and retaining only the correct minimal reduction of the runtime
<Mutabah>
... huh?
<epony>
btw risc is slow and contended for data as throughput to memory and as general programming is inferior
<epony>
yep
<epony>
it's for logic serialisation, not for general purpose machine implementations, for internal functional blocks of micro-processors as serialised pipelines
<Mutabah>
I'm not sure I can read any sense into your comments (e.g. I've never heard the terms "punchmark" and "pinchmark")
<epony>
so, get educated
<epony>
then you'll be able to enjoy the humour too ;-)
<epony>
oh, and one more thing: both data centres and general purpose performance computers run on CISC which has nothing to do with your sexual self-mutilation
<Mutabah>
Ok... that's just uncalled for
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<epony>
that's what you get when you play smart "can't parse / makes no sense", contention and aggravation for nothing in particular, just don't make that a habit of yours.. it's not good for the public culture and mood / tone
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<epony>
classic mistakes
<epony>
it's called for and you called it ;-)
<epony>
people do what they want and say what they need / have intended to, you can just "reduce your visibility" to that, does not mean the saying does nto exist elsewhere and in a more direct way
<epony>
anyway, it's not important.. focus on what matters
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<epony>
try to address the technical points you have time for that, if not.. enjoy something else like a better way to say more meaningful things
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<epony>
like Rust being hypey and fakey
<geist>
oh for cryin out loud what are you blabbing about?
<geist>
it's just a continuous stream of vaguely sensical stuff
<epony>
faux safety
<kazinsal>
just ban them dude
<epony>
yeah, ideal
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<epony>
that way I won't be seing idiocracy ;-) and poke analogies
<geist>
i guess, i'd rather they just start trying to make sense. or at least if they're just blabbing and no one is responding, take the hint
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<epony>
typically, it's the people who say "don't understand" who don't get the idea ;-)
<zid>
geist's a big proponant of people working mental illness out of their system
<zid>
like it's a cold or something
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<Ermine>
yeah, why try to make sense and make things clear when you can just say 'you all are just a bunch of dumbasses'
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<Mutabah>
kazinsal: Ah, didn't noticed them re-join
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<epony>
"them", like it's 5 people..
<epony>
"our multiple personalities are not very interesting" --we
<zid>
It wouldn't start, we spent ages, got it starting
<zid>
went to drive me home
<zid>
died a hundred meters away
<gog>
ooof
<zid>
We've diagnsosed it down to: it's being really fucky
<zid>
It wasn't starting at all, wiggling the glow plug harness would get the glow plug relay to click and then it'd start, and die again after 2 seconds
<zid>
so it's basically just haunted
<gog>
maybe the glow plug isn't staying on long enough so the head is just too cold
<gog>
unless it's otto cycle and you meant spark plug :P
<kaichiuchi>
zid: come to america
<kaichiuchi>
there is a mechanic every 10 steps
<zid>
glow plug stuff is all ecu managed
<zid>
and it's now refusing to do much of anything
<zid>
it *could* have been that the glow plugs were just BARELY hanging in there and the wigglign moved some crud off a wire and gave it an extra .1V
<zid>
but that seems unlikely, just as likely that the fuel pump is unhappy or the crank sensor or something idk, it *really* needs the engine codes read out
<kaichiuchi>
i have a blue driver that hooks into the OBD port just for that reason
<kaichiuchi>
but I don't need it anymore
<kaichiuchi>
if I break down I call a number that will pick the car up and take me home
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<ddevault>
the entire reason for porting to aarch64 over the past several weeks was to write these hundred-odd lines of code rather than write an intel HD graphics driver
<zid>
I'd rather write an intel hd graphics driver ngl
<ddevault>
gl with those docs
<ddevault>
anyway I'm working with a deadline here
<zid>
ye
<zid>
82810 driver seems mroe reasonable
<zid>
Someone should sell an 82810 on a pci-e card
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<kaichiuchi>
it is cold
<pog>
hi
<kaichiuchi>
pog: may i gog you
<pog>
yes
* kaichiuchi
gogs pog
* pog
pogs
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