<jevinskie[m]>
Once I get this Avalon-MM PIO bridge working I’ll add DDR3 support to DECA using the Altera External Memory IF IP :)
<_florent_>
be used for these purposes.
<_florent_>
jevinskie[m]: For traceability, I've been working several years on avionics certification in my early carrier (10 years ago) and I'm currently discussing with previous colleagues that seems interested by tools similar to LiteX but that would requires a new HDL generation to matches their needs (and source to source traceability is one of the requirement). So while revisiting the HDL generation, I'll also try to make sure it can
<_florent_>
jevinskie[m]: I've probably used Avalon-MM in the past, but not sure I remember much. Happy to have a closer look with you if you are stuck.
<shorne>
_florent_: I think it should not take too long to bisect. I will let you know if it needs reverting.
<_florent_>
For those interested in CPU design, Dolu1990 (VexRiscv) is working on a new CPU with very nice specs, already able to boot Linux: https://github.com/SpinalHDL/NaxRiscv
<geertu>
_florent_: Thx for the link! Do if you if there are any small linux-capable RV64 cores under development?
<_florent_>
geertu: I know Dolu1990 has plans for this but first wanted to have a clean new implementation, so I think that's the long term plan for Nax :)
<_florent_>
geertu: BTW, Nax should also be available in LiteX soon
<geertu>
_florent_: Good! Looking forward to giving it a try.
<DerekKozel[m]>
I have my XTRXs out and hope to try it here soon
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<sajattack[m]>
happy february. any news on the acorn baseboard?
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<jevinskie[m]>
_florent_: thanks for the offer for help! I'll keep hacking on it and if I can't make progress I'll share a reproducible setup for the DECA (a handy lingua franca like the arty it seems).