<cr1901>
https://github.com/cr1901/smolarith I wrote some pipelined unsigned and signed multiplier cores in Amaranth. If you have hard muls, this repo is prob not for you.
<cr1901>
GH wanted me to call this repo ideal-pancake. And I almost did, except I should prob have a non-shitpost name
<cr1901>
Tested on all 65536 possible 8-bit multiplies, and it passes :)
<whitequark[cis]>
neat!
<cr1901>
yosys got a Booth multiplier pass recently. I've been trying to work my way through understanding that. So I'll prob add that (and a slow divider eventually)
<cr1901>
I don't have the correct setup to test this right now, but last I checked, the unsigned multiplier got 70MHz on the slow-as-molasses up5k
<cr1901>
70 million 8x8 multiplies per second for ~300 LUTs... seems like a good deal, if I had a use for that many muls
<jfng[m]>
i won't be able to conduct a SoC meeting today, sorry !
<galibert[m]>
Oh well, it was not a good week for meetings
<jfng[m]>
yeah..
<galibert[m]>
Bah, it happens
<jfng[m]>
@galibert: btw, feel free to try the new bus interfaces in amaranth-soc, they're in main now
<cr1901>
jfng[m]: I won't be here for the next meeting more than likely (9/22).
<galibert[m]>
Oh excellent
<cr1901>
Yeeeeeeees!! Re: bus interfaces
<galibert[m]>
Been busy emulating the mu50 lately, just got the wave roms and it's really fun :-)
<cr1901>
I am also unlikely to be here for 9/25 due to prior commitment
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<galibert[m]>
cr1901: Enjoy the long week-end then :-)
<cr1901>
Will certainly try to lol
<galibert[m]>
Need to look how you managed to avoid race conditions in the priority arbiter too
<galibert[m]>
I have the complete setup in my mind except what happens when a higher priority intiator calls while a lower one is currently doing an access
<cr1901>
Let the lower one finish, or include logic to let the lower one bail. I actually have a use case for the second one in efbutils
<galibert[m]>
cr1901: my issue is pretty much "how to let the lower one finish without adding a ton of state"
<cr1901>
*that's the neat part you don't meme*
<galibert[m]>
?
<cr1901>
Bad attempt at a joke, nevermind
<jfng[m]>
galibert[m]: the arbiter only switches to the next initiator at the end of a transaction
<galibert[m]>
finding who's next is very comb, need to think on what to enable the decision
<jfng[m]>
you use a priority encoder, and you sort the inputs lines by their priority ?
<galibert[m]>
I would say that, without the encoder part
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<tpw_rules>
so the analogue pocket is supposed to be some sort of official amaranth demo platform?
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<whitequark[cis]>
nope
<whitequark[cis]>
it's not even going to be supported in amaranth-boards probably
<tpw_rules>
just a neat thing for you personally then?
<whitequark[cis]>
I don't have one
<tpw_rules>
i had thought i heard something about tutorials centering on it
<whitequark[cis]>
and will probably not have
<tpw_rules>
i know a few amaranth enjoyers (myself included) have them and are interested but i thought there was something more official and i see you've been nosing around in their channels :)
<tpw_rules>
if not that's cool, just curious
<whitequark[cis]>
there is a separate thing called "amaranth tutorial device" which has the same rough outline
<whitequark[cis]>
but costs like $40 at most
<whitequark[cis]>
analogue pocket is full of annoying verilog that i hate the idea of rewriting
<whitequark[cis]>
well, their base files
<tpw_rules>
okay. so you are planning to at least offer designs for a pocket-like device (in very vague terms)
<tpw_rules>
hardware designs
<tpw_rules>
i had done a little bit of it for litex but did not get super far. maybe once amaranth-soc comes up i'll try more
<tpw_rules>
but okay, good to clear that up. the idea of a tutorial device sounds very cool, not sure how far along that is or if it needs contribution
<whitequark[cis]>
it's been something i've not worked on very publicly mostly because i didn't feel a need to publicize it before it's ready