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<FL4SHK>
so I got GCC to output some assembly code
<FL4SHK>
for my custom processor
<FL4SHK>
haven't gotten libgcc to build yet
<FL4SHK>
that's something I hope to get working this week
<whitequark>
hello everyone, unfortunately jfng will not be able to attend, and also I am still unable to get necessary healthcare
<whitequark>
sorry to disappoint but the meeting is postponed once more
<d1b2>
<Olivier Galibert> ok
<d1b2>
<Olivier Galibert> fyi, it's highly improbable I'll be here on the 1st, and mostly improbably for the 8th
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<FL4SHK>
oh no, sorry to hear about you not being able to get healtcare, whitequark
<d1b2>
<Nate> I have two fsms inside one module (one pos edge, one neg edge). Is there a way to specify a clock domain for the negedge fsm ? Or do I need to have a single module for each fsm and then use domainrenamer? Seems both fsms are rising edge sensitive