07:00 <d1b2> <Olivier Galibert> Hi, I have an incoming sync domain that's actually a 32MHz clock + a divide-by-4 enable signal added with EnableInserter giving a 8Mhz domain. Can I, in the module, take the sync domain and divide it by two to create a new domain that will end up at 4Mhz?

07:01 <d1b2> <Olivier Galibert> the module sohuld not know or care what the original clock is at

07:37 <d1b2> <Olivier Galibert> Ok, just remembered it's not (yet) possible

23:08 <d1b2> <josuah_dem> You could add an extra domain?

23:09 <d1b2> <josuah_dem> Not the sync domain though...

23:11 <d1b2> <dratini0> So, I have been experimenting with Amaranth for tinytapeout, but I think the issue I'm running into is not specific to OpenLane. The docs say that if I don't explicitly name my signals, they will be named based on the attribute I assign them to (https://amaranth-lang.org/docs/amaranth/latest/lang.html#signal-names). However, when I try to do that, I end up with a bunch of unnamed signals, which then makes OpenLane's Yosys to complain:

23:11 <d1b2> ERROR: Mix of positional and named cell ports. Here is the commit that seems to fix this issue for me: https://github.com/dratini0/tt03-pov-display/commit/843ce4484a499692581bb4c838b0cfd2f15e8ec6 What am I doing wrong?

23:28 <mwk> what version of amaranth are you using? this sounds like a bug that's already fixed on git main

23:31 <d1b2> <dratini0> Let me check

23:31 <d1b2> <dratini0> It is 0.3

23:33 <mwk> yeah, that's been a while ago

23:38 <d1b2> <dratini0> Thank you, you're right. Installing from Github fixes the issue!