billchenchina has quit [Ping timeout: 245 seconds]
mahk has quit [Changing host]
mahk has joined #riscv
vigneshr has quit [Quit: Connection closed for inactivity]
arkanoid has quit [Ping timeout: 246 seconds]
junaid_ has joined #riscv
arkanoid has joined #riscv
arkanoid has quit [Ping timeout: 245 seconds]
arkanoid has joined #riscv
arkanoid has quit [Ping timeout: 250 seconds]
arkanoid has joined #riscv
arkanoid has quit [Ping timeout: 245 seconds]
ema has quit [Quit: leaving]
ema has joined #riscv
wingsorc has quit [Ping timeout: 246 seconds]
Tenkawa has joined #riscv
arkanoid has joined #riscv
arkanoid has quit [Ping timeout: 245 seconds]
billchenchina has joined #riscv
billchenchina- has quit [Ping timeout: 245 seconds]
joev has quit [Ping timeout: 245 seconds]
joev has joined #riscv
joev has quit [Ping timeout: 246 seconds]
joev has joined #riscv
BootLayer has quit [Quit: Leaving]
lainon has joined #riscv
lainon has quit [Client Quit]
billchenchina- has joined #riscv
billchenchina has quit [Ping timeout: 245 seconds]
BootLayer has joined #riscv
Maylay has quit [Quit: Pipe Terminated]
Maylay has joined #riscv
Trifton_ has joined #riscv
<la_mettrie>
here we see clk_set_parent() calls on lines 586 and 594. the comments mention about setting parent to clocks osc_clk and pll0_clk. but linux's clk.h file suggests that actually the second parameter is the parent (and thus code seems to set parent to cpu_root twice with just one other call between). are the comments misleading or is the code wrong?
junaid_ has quit [Remote host closed the connection]
Trifton_ has quit [Quit: Error: no route to host]
Armand has joined #riscv
<jrtc27>
meowray: ITYM "I am fortunately not familiar with Mips" :P
<meowray>
jrtc27: feel free to comment on https://reviews.llvm.org/D154589 ("MIPS: setMaxAtomicSizeInBitsSupported to 0 for MIPS I") :) i think the author is from the last company that investigates in mips...
<dh`>
I am perhaps regrettably familiar with mips but not familiar enough with llvm to read the patch intelligently
<sorear>
SeRV and M0 sit in very different parts of solution space
<muurkha>
yeah, SeRV as an actual solution is kind of competing with something like Picoblaze, isn't it?
<muurkha>
or a dumb state machine
Andre_Z has quit [Quit: Leaving.]
<muurkha>
Smecher says Minimax uses "116 FFs, 398 CLB LUTs" which I guess is on some kind of Xilinx
<sorear>
I wasn't impressed by minimax's cost-benefit analysis when I saw it; I'd like to see a serious comparison with a non-expanding rv32ic using a 16-bit instruction bus
<sorear>
the 32 extra GPRs is going to suck for asic implementation
<muurkha>
M0 is fast enough to do things like bitbang PAL color or significant amounts of DSP, I'm just dismayed at its rebarbative limitations. the opposite extreme from ARM!
<muurkha>
you could do RV32EC rather than RV32IC
<muurkha>
or am I misunderstanding you?
<sorear>
the tiny rv32[ie]c implementation I want to see is one with an 8 or 16 bit datapath and 4 or 2 cycle instructions
zBeeble42 has joined #riscv
jedix has quit [Ping timeout: 240 seconds]
<sorear>
you're not misunderstanding me, but there's no difference in control complexity between E and I