sorear[m] changed the topic of #riscv to: Matrix users: #riscv:libera.chat will be ending operation NET Jul 25; please test #riscv:catircservices.org as a replacement | RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<unlord> is qemu-system single threaded?
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<unlord> I see there is an option you can pass https://wiki.qemu.org/Features/tcg-multithread
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<courmisch> AFAICT, it creates one host thread per virtual cpu and then some more
<courmisch> that page is probably way out of date
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<unlord> it looks like I can pass --accel tcg,thread=multi
<mps> unlord: yes, I use '-accel tcg,thread=multi' for long when running riscv64 qemu on aarch64
<meta-coder> Is this channel going to shut? I don't understand the /topic
<conchuod> If you don't use matrix, you don't need to care AFAIU
<meta-coder> Ok.
<mps> unlord: about two years ago I wrote this https://arvanta.net/alpine/install-alpine-riscv64-qemu-uboot/ probably outdated now
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<unlord> mps: is --accel tcg,thread=multi necessary? The documentation says it will be enabled by default if the emulated platform supports it
<mps> unlord: I didn't noticed big difference with or without it, but I didn't tested riscv in qemu for more than a year
<unlord> mps: I will know in a few minutes if it helps my workloads
<unlord> hmm, hard to say
<unlord> maybe it is faster?
<mps> unlord: I experimented with thread=multi but at the end removed it and now can't remember why
<courmisch> I know I sound like a broken record but don't use system QEMU if you want to optimise for perf
<mps> and just noticed that my guide is now outdated and wrong, have to find some time to test all these again and update
<courmisch> soft MMU is never going to be fast
<mps> courmisch: yes, I use qemu-user for building riscv things
<mps> but it is also not so fast even on apple silicon m1pro
<courmisch> I think an adhoc RV to A64 recompiler could be plenty fast, much faster than TCG
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<courmisch> but nobody has written it
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<courmisch> I'm stuck with x86 so no motivation :)
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<mps> not sure if riscv binaries could run in FEX emulator
<mps> or it is only for x86
<courmisch> I thought that only ate x86
<courmisch> I was more interested in implementing the opposite direction but A64 is so much more complicated than RV
<courmisch> and RV has no place to store the NCVZ and SP bits
<Tenkawa> mps: do you have a test scenario string with qemu I can run on this M1 MBP? I want to compare it vs my Paralles VM (which to be honest flies)
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<Tenkawa> er Parallels
<mps> Tenkawa: only this url I posted above, but it is outdated (as I wrote)
<mps> I think I will try to update it on weekend and post mail to starfive ML
<mps> uhm, no starfive ML but to riscv foundation front man (Jeff)
<Tenkawa> It should be enough to give me a test template
<mps> Tenkawa: this is my start script with u-boot SPL https://tpaste.us/D7wa
<Tenkawa> I mostly just needed the qemu wrapper startup bit
<Tenkawa> yep
<Tenkawa> thats the part
<Tenkawa> thanks
<mps> not sure if it works nowadays
<Tenkawa> Will see shortly
<Tenkawa> Need to trackdown the u-boot blob now
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<unlord> hmm, it doesn't look like it is faster
<mps> Tenkawa: just updated my script to create alpine basic image for qemu
<unlord> mps: how do you use qemu-user for building?
<Tenkawa> mps: cool thanks.. yeah I'm going to give it a try
<mps> unlord: I install qemu-riscv64 and run qemu-binfmt init script
<mps> Tenkawa: new build img script is https://tpaste.us/BJw9
<Tenkawa> Thanks
<unlord> ahh, so then I can just mount and chroot into my img file
<mps> Tenkawa: start script is https://tpaste.us/b1DX
<mps> if you don't have fw_payload.bin.old you can download from my alpine dev repo https://dev.alpinelinux.org/~mps/riscv64/fw_payload.elf
<Tenkawa> Yeah I have them
<Tenkawa> but I am going to get yours to be consistent
<mps> Tenkawa: omg, it doesn't boot with https://dev.alpinelinux.org/~mps/riscv64/fw_payload.elf
<unlord> I can follow this guide
<mps> so, need fw_payload.bin
<mps> hm, wrong, it boots with old fw_payload.elf but not with new one
<mps> ok, I have to clean and consolidate all my scripts and docs
<mps> unlord: idk know for gentoo but on alpine I run `/etc/init.d/qemu-binfmt start` on host machine to work with qemu-user mode
<unlord> yeah, I just did all that and I can now run elf64 riscv binaries
<unlord> let me see if I can chroot and mount this raw bin
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<unlord> mps: I'm able to mount my .img file, but when I chroot I get: chroot: failed to run command '/bin/bash': No such file or directory
<Tenkawa> unlord: do you have binfmt setup on your host?
<mps> unlord: you have to bind mount /sys /dev and /proc
<Tenkawa> mps: not just to chroot.. but they do have to have binfmt
<unlord> Tenkawa: I do, I have a test program and it runs
<courmisch> and qemu must be static IIRC
<unlord> Do I need to install qemu into the guest too?
<unlord> courmisch: I have host qemu built with USE=static-user
<mps> unlord: here is my script to chroot https://tpaste.us/7MpO
<courmisch> not sure aboit gentoo. Debian binfmt just worked for me IIRC
<mps> adapt it to your working dirs
<Tenkawa> you can chroot without all the binds usually just not do next to anything...(In every scenario I've used)
<Tenkawa> you can open a shell... just don't try to run apps...
<courmisch> or you ask your boss to buy you a MilkV
<mps> Tenkawa: yes, binfmt must be 'activated'
<mps> courmisch: is MilkV available on market
<courmisch> I dunno, I didn't follow up since it's clearly not my hobbyist self
<Tenkawa> mps: I don't think so yet... sadly
<Tenkawa> The RPI4 needs a competitor heheh
<courmisch> LPi4a ? but no NVMe unlike VF2
* mps never bought any RPi and using arm for 20 years
<unlord> Tenkawa: right, I would have expected the chroot to work even if I hadn't mounted everything through
<Tenkawa> unlord: without the binfmt enabled kernel side on the host it won't
<courmisch> RPi's success is to a significant extent about software support. it's so much easier to work with than most comparable embedded SBCs
<unlord> Tenkawa: binfmt is enabled kernel side on the host
<unlord> I am able to run a riscv64 binary on the host
<unlord> ahh, I had to copy the static built qemu-riscv64 into /mnt/gentoo/usr/bin
<unlord> I'm in
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<unlord> wow, this is way faster for building
<Tenkawa> heheh
<Tenkawa> this is what's funny on my box.. I have both 64 and 32 bit env configured... not that I'd ever use 32 bit
<courmisch> ofc,hardware MMU and host kernel...
<mps> I have riscv64 lxc for alpine development
<Tenkawa> nice
<mps> so I can ssh to it over net
<Tenkawa> mps: I was quite happy to see how well this M1 works with ARM64/RV both since that's all I work on... I don't do anything x86 related anymore.
<mps> for short 'living' tasks I spin chroot but for long needed ENVs I use lxc
<mps> Tenkawa: I stopped to use x86 about 12-13 years ago for anything personal
<courmisch> I wonder what horrible hack user QEMU uses on fork()
<Tenkawa> Same... about 2010
<courmisch> maybe I don't want to know
<unlord> courmisch: this is great
<mps> Tenkawa: hah, also at this time
<courmisch> unlord: now you can take over from me to port all OSS multimedia to RV
<unlord> courmisch: perfect
<unlord> as long as I get to do it in gentoo
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<courmisch> there goes my job safet^W^Wahem business plan
<unlord> I am kind of confused how this chroot works
<unlord> /proc/cpuinfo shows the host CPU
<courmisch> well yeah that's one or the limitation
<unlord> so programs that parse this to try and figure out what extensions RISCV has will clearly not work
<courmisch> it's really more of a build env
<conchuod> They should stop parsing that garbage anyway :)
<courmisch> dbus and display server probably don't work
<unlord> yeah, so building llvm did not work
<courmisch> parsing cpuinfo is so x86
<unlord> weird, running it again worked
<mps> `setarch` maybe could help
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<courmisch> sudo - somebody implement riscv_hwprobe in QEMU user
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<courmisch> well looks like it's already been done
<courmisch> but it doesn't have Zb and V yet :/
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<palmer> courmisch: ya, we just got the first round. IIRC it was before the other stuff had been released, but I forget what's shown up. Robin is on vacation for like a month, so it'd be a bit before it gets added
<courmisch> those people, not only paid to work but taking vacations too
<unlord> palmer: what about getauxval() for riscv?
<courmisch> it's a one line patch, as I see
<courmisch> but it's not been done
<courmisch> need to unmask 'V' in linux-user/elfload.c
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<palmer> ya, I'm not surprised there's some uABI missing from QEMU -- that's kind of always the case
<palmer> I don't know of anyone working on it, should be a simple patch ;)
<unlord> is it simple enough that someone who has never contributed to QEMU can write it?
<palmer> sure, just go for it
<palmer> you can pretty much send patches for anything, it might just take a bit longer if it's your first time
<unlord> OK, I'm very interested to see getauxval() fixed
<courmisch> last time I submitted code to QEMU somebody dared to find a bug in my patchset
<courmisch> tsk tsk
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<Tenkawa> hmm... just sitting here with a lot of cpu spin
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