sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<drewfustini> for debugging Linux interrupts, has anyone used a mechanism to for a PLIC source to be pending? Essentially pretending on of the PLIC sources has been triggered.
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<conchuod> like the debugfs interface for triggering interrupts?
<conchuod> irq_inject_interrupt() or w/e it is
<conchuod> don't think that works for the plic unfortunately
<conchuod> maybe someone can correct me on that one
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