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<arnd>
palmer: it all looks good, I merged the pull request into the asm-generic tree now
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<arnd>
palmer: actually I had expected the csky/openrisc/riscv bits to also go through the asm-generic tree. It's obviously ok if you keep the riscv patches in your own tree on top of the common commits, but should I just merge the csky and openrisc patches on top to save shorne and guoren the complex merge?
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<mps>
sorry, but is Jeff Scheel here?
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<palmer>
Arnd: ya, that's great for me. Doesn't make sense to have the csky and openrisc patches through the RISC-V tree any more with the multiple trees
<palmer>
I kind of tried to leave it up to them, but sounds like they didn't want to do the merge
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<palmer>
mps: Jeff is the RVI guy? they're not usually in here
<mps>
palmer: yes. but in meantime he posted mail which explains question I had for him
<palmer>
OK. There's also an RVI Slack, not sure who's on there
<mps>
would like to not use slack and similar things
<palmer>
ya, I don't go there either ;)
<palmer>
the RVI folks want to keep everything in their own world, though, so they've got all that sort of stuff
<mps>
yea, and they use google groups for open and free source development, imagine
<mps>
I prefer simple mail and irc
<mps>
but they offered visionfive board to me to 'port' alpine linux to it
<mps>
I would buy board myself but because of shortage can't for now
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<palmer>
is that the first-gen chip? IIRC it's pretty broken
<palmer>
there's a spin that should fix it, but I haven't seen anyone with one yet
<mps>
JH7100 afaik
<mps>
will see when board arrive here
<mps>
iirc mainline kernel supports it from 5.17 or 5.18
<palmer>
OK, I thought we didn't because of the non-coherent stuff
<palmer>
but maybe all those workarounds just worked ;)
<mps>
idk, till now I only used qemu to play with riscv
<palmer>
OK, well, hopefully it just works
<palmer>
I have one of the broken chips somewhere, but I haven't used it because it seemed like folks stopped caring