sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<hanetzer> well, thanks for that. I found something that more fits my use case (the aspeed spi flash controller)
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<Xav101> I seem to have encountered something odd. Invoking the riscv32-unknown-as built by the riscv-gnu-toolchain project doesn't seem to specify the architecture of the ELF executable.
<Xav101> objdump thinks it's an unknown architecture it seems
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