sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<mps> I read this yesterday and wonder is that true
<mps> i.e. mips builds fastest riscv
<muurkha> on the face of it it seems implausible
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<pabs3> 512 cores seems like a lot though?
<muurkha> 512 SeRV cores wouldn't be much horsepower
<muurkha> this is sort of the other extreme though
<muurkha> "16-stage pipeline for higher clock frequency" makes me think of NetBurst
<muurkha> (which, as probably everyone here knows, was a catastrophe)
<muurkha> 16 isn't really that high though
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<mps> 'we' (alpine linux) have tarballs for riscv64 here https://dl-cdn.alpinelinux.org/alpine/edge/releases/riscv64/
<mps> we still don't have iso image because we currently build packages and kernels with qemu-user
<mps> but some of alpine developers have hifive or similar boards and runs alpine quite fine on them
<mps> and there is guide somewhere (have to look where if someone need it) about installation
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<arnd> the i8500 was originally announced in 2020, it's pretty much the old i6500 in-order mips core with the instruction decoder replaced. I even mentioned it in https://lwn.net/Articles/838807/. The p8700 is likely just a new name for what was then known as the i8800, or a follow-up to the p6600
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<conchuod> If (when) I get bored I should check that out
<conchuod> mps*
<conchuod> Googling gives me a Drew blogpost from a few years ago and not too much more, is that what youre talking about?
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<mps> conchuod: no
<mps> let me check
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<mps> I made this one for running riscv under qemu https://arvanta.net/alpine/install-alpine-riscv64-qemu-uboot/
<nmeum> yea, alpine edge works fine on riscv64. using it regularly on the unmatched to test stuff on riscv64
<psydroid> that's going to be quite useful
<psydroid> maybe also to the teacher in #debian-riscv, if it has a working compiler
<ikke> Waiting for my board to arrive
<mps> hah, I see old friend here, nice :)
<mps> friends*
<nmeum> one blocker for offical riscv64 support in alpine is that rust doesn't work properly on riscv64 musl atm. has anyone in channel by any chance managed to get rustc running on riscv64 musl by any chance?
<palmer> nmeum: do you have a pointer? we've got folks here using both rust and musl, but not together yet (at least that I know of)
<mps> well, I vouldn't call it blocker, afaik rust doesn't work on s390x also with musl
<palmer> I just don't like stuff that's broken ;)
<nmeum> palmer: I managed to cross-compile a stage2 rustc for riscv64 musl with some light patching but unfourtunatly, the stage2 segfaults on more complex rust code see: https://github.com/rust-lang/rust/issues/96876
<mps> and from experience I can tell that porting rust on musl is not easy task especially with qemu-user, I remember when I did this for aarch64 and armv7
<palmer> yes, even glibc on qemu-user has issues -- C libraries just have a lot of complex system dependencies, and getting everything work in qemu-user is hard
<mps> my 'issue' is that I lost interest in about two years ago. looks like I have to start again to learn work with it
<mps> lost interest in rust*
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<palmer> ya, I'm not really a rust guy myself (I kind of just don't care about programming languages), but there's a bunch of Rust folks around who might care
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<muurkha> arnd: thanks!
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<palmer> arnd: so this is kind of embarassing, but I forgot the ">" in your Reviewed-by tag
<conchuod> I think you forgot tags to add tags on one of the patches entirely palmer (although if I personally cared I'd have said it sooner)
<conchuod> mps I assume there's nothing that locks this to unleashed & I should just be able to chroot the images here?
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<palmer> Ah, sorry
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<palmer> Let me see if Arnd is willing to do a respin, otherwise we'll just have to live with it
<palmer> I thought I had some checkpatch hooks, but this was an odd one
<palmer> arnd: I pushed generic-ticket-spinlocks-v6, I'll hold off until you decide if you want to take that or if you want me to take v5. Sorry!
<arnd> palmer: no worries, I had nothing else applied on top, so it was easy to replace, pushing out the updated branch for linux-next now
<palmer> cool, thanks!
<palmer> my "tags from email" stuff only handles a tag on the exact message and alone on a line, so I screw these up sometimes because I have to do them by hand
<palmer> Google's going to ban my OAUTH setup in a few weeks, so maybe that'll be enough to force me to move to b4 ;)
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<conchuod> I think that's going to brick my gdrive mount setup too :/
<conchuod> I don't think b4 likes tags that aren't on a line alone either, at least the time you brought it up to me b4 wouldn't have got that tag either.
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<conchuod> Or at least, it doesn't like it when the line doesn't start with the tag.
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<mmind00> palmer: I now managed to run the ci stuff completely now (first with a pristine 5.18-rc6 and later adding the svpbmt series) ... I fixed some compiler-flag issues for rv32 and kasan with the early patching and just sent a v10 [https://lore.kernel.org/r/20220511192921.2223629-1-heiko@sntech.de] ... and the whole qemu tests ended with an "OK" :-)
<palmer> awesome
<palmer> I'm trying to move the whole company to GCC trunk, but once that finishes chugging I'll go merge the stuff
<palmer> thanks!
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<mps> conchuod: ime, userspace should work on different boards but not sure if kernel needs tweak for particular boards
<conchuod> ye thats what I figured mps, thanks
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<mps> conchuod: np. I didn't followed much alpine on riscv in last few months, I'm busy with some arm boards. and we didn't get reports from users on riscv afaik
<mps> but if anyone wants to test/use alpine on riscv feedback would be really appreciated
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