sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<kaddkaka[m]> Has there been any work on riscv hardware loops? Like an extension to the ISA with `loop`/`break`/`continue` instruction?
<kaddkaka[m]> s/instruction/instructions/
<rjek> For DSP code?
<kaddkaka[m]> Yes
* rjek is always amused by them because they're often implemented as Intercal's "COMEFROM"
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<kaddkaka[m]> I'm not sure what that means 🤔
<jemarch> Intercal's primitives for concurrent programming
<kaddkaka[m]> oh right, Ive read about that before, hehe. But I don't see any resemblence to hardware `loop` instruction
<kaddkaka[m]> oh ok maybe
<kaddkaka[m]> "jump back here when you reach this PC"
<kaddkaka[m]> sure
<jemarch> :D awesome
<kaddkaka[m]> So, is there any riscv ISA part/extension supporting that?
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<jrtc27> kaddkaka[m]: the CV32E40P (world's best name) has a custom extension for hardware loops
<jrtc27> though it's known to have security holes
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<kaddkaka[m]> Ok thanks I will look into it 👍
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<geist> oh yeah i have seen something like that (comefrom instruction)
<geist> was in some bluetooth chipset with a custom cpu. i think they were using it to insert patches to their ROM
<geist> you could i guess have so many number of these active, and it acted like a patch list
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<xentrac> rjek: do you mean DSP hardware loops are often implemented as COMEFROM, or hardware loops in general are?
<rjek> DSP ones are, let's them avoid pipeline stalls
<rjek> "Loop the next ten instructions a dozen times" etc
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<xentrac> cool, thanks
<xentrac> the raspberry pico pioasm coprocessor has something similar
<xentrac> and I think in that case their considerations may have included avoiding the extra delay of the instruction and avoiding using up instruction space for it
<xentrac> if your pioasm loop body is 2 instructions long then implicit looping makes it 33% shorter and 50% faster
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<xentrac> rjek: just added a note mentioning you in text/c-stack-bytecode.md in http://canonical.org/~kragen/dernocua.git
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<Jmabsd> "SiFive (the main vendor) is on record saying that the equivalent of the boot ROM / SBE should never be open source, so there are serious concerns there."
<Jmabsd> Sucks! :(
<xentrac> ugh :(