sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<rjek> And BuildStream/Freedesktop-SDK
<JosefHolzmayr[m]> rjek: interesting, do you have a link/pointer where to start digging that?
<JosefHolzmayr[m]> thx
<rjek> I've had it booted on my Unmatched
<JosefHolzmayr[m]> ah i think i get it. the project scope is the flatpak distribution format, and therefore they want it to support multiple architectures, with riscv being one of them.
<rjek> Well, BuildStream is about building and integrating complex systems with actual reproducability, Freedesktop-sdk is a basis for producing lots of things, be it a runtime for flatpaks or whole OSes: GNOME OS is based on it
<JosefHolzmayr[m]> hehe "BuildStream takes inspiration, lessons and use-cases from various projects including <snip> Yocto <snip>"
<JosefHolzmayr[m]> will take a good look at it!
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<rjek> *lessons* from Yocto :)
<JosefHolzmayr[m]> there are many of those
<JosefHolzmayr[m]> i mean, it would be sad if we were are around for 10years now and hadn't suffered any lessons to learn.
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<la_mettrie> is there a better risc-asm online-guide than this? https://shakti.org.in/docs/risc-v-asm-manual.pdf
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<jrtc27> it looks pretty detailed but I've already found a complete lie in §1.2.1
<la_mettrie> can you elaborate?
<jrtc27> there are no requirements on the alignment of sp as far as the hardware is concerned
<jrtc27> it's just like any other register, put whatever value you want in it
<la_mettrie> okay, i was actually thinking that sounded a bit strange
<jrtc27> the *effective address* for loads and stores needs to be suitably aligned, but that is not special wrt sp as it applies to any register use, it's about the register plus the immediate not just the register's value, and the needed alignment varies based on the type you're loading
<jrtc27> there *are* alignment requirements on sp when it comes to the *ABI*, but that is that it must be *16*-byte aligned, and is purely a software convention
<jrtc27> (unless you are on RV32E, in which case it is just 4-byte aligned)
<jrtc27> also "The LA directive is an assembler pseudo-instruction which computes a pointer-sized effective address of the SYMBOL, but does not perform any memory access" is a little misleading
<jrtc27> it doesn't access SYMBOL but it sure can access memory if it wants to get the address by loading it from the GOT
<jrtc27> (which is what it'll do for -fPIC)
<jrtc27> and some *weird* categorisation
<jrtc27> why is MV in the load/store chapter mentioning ADDI before the arithmetic chapter that defines ADDI...
<la_mettrie> riscv asm book by anthony j. dos reis is fine?
<jrtc27> never read it
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<pierce> <la_mettrie> "riscv asm book by anthony j. dos..." <- It's on my shelf collecting dust, I really need to actually crack it open!
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<hendursaga> la_mettrie: it's decent, I suppose
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