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<Ermine>
ntoskrnl.exe
<Ermine>
what's happening in the kernal land today
<kof673>
filesystem, malloc, scripting language thing, i do have a plan for "kernel" just very slow :D
<kof673>
they can be tested in userland/hosted first...........
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<geist>
RUUUUST
<zid>
Ermine: nikolar is taking the day off
<mpetch>
@zid on an unrelated note I saw mention of call print_debug; db "Error msg" and it reminded me of the call/pop (part of jmp.call/pop) method used by stack overflow exploits to embed a string in the payload and get its address from the stack.
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<geist>
yah that's a fairly common pattern in a lot of early architectures that didn't necessarily have a stack pointer or some sort of hardware stack
<geist>
but had some sort of branch-and-link sort of instruction that would let you at least get back to where you came from
<heat_>
GEIIIIIIIIIST
<heat_>
hi
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<heat_>
yesterday i randomly remembered that bizarre nintendo nx bug with the missing memory barrier plus cache clearing
<heat>
it is a little odd that the nx kernel doesn't have a single memory barrier in its scheduler
<heat>
linux has like 3 or 4
<zid>
yea you'd think something would serialize
<geist>
this is a known thing, you're supposed to insert a DSB in the conect switch at the minimum in case you interrupted a sequence like this
<geist>
which is what you just said yeah. it's non obvious
<heat>
not just for this but you want barriers for various other things
<zid>
you'd assume it'd just.. never work
<zid>
or always work
<heat>
including syncing up task wakeup with task sleeping
<zid>
never work because the barriers were missing, or always work because the sched does lots of systemy stuff and probably causes a serialize regardless
<heat>
you also want a barrier on task spawning
<zid>
but it *very rarely failing* is kind of funny
<geist>
yes, but in this particular sequence it's actually mentioned in the arm doc
<geist>
since you issue the cache flushes (or tlb flushes too) and then must issue a DSB as a seperate instruction
<geist>
either you must do that operatio with interrupts disabled (slow)
<geist>
or you must arrange for there to be a barrier inside the interrupt if theres going to be some sort of task switch that does't let it complete the sequence
<heat>
do you need a dsb or just a dmb?
<geist>
and yeah it's be *extremely* hard to see this sequence
<geist>
dsb
<heat>
why?
<geist>
dmbs only deal with memory and memory barriers, DSBs *specitically* in addition to being a DMB also interlock with cache and TLB ops
<geist>
think of a DSB = { DMB, wait for other pending OOO ops like cache/TLB }
<zid>
super dmb, that's what the s is for
<geist>
i think the other way of looking at it is DMB isn't really 'blocking' per se. it simply orders memory operations as they're setting in the queue
<geist>
DSB however actually stops forward progress and waits for things to commit
<geist>
then at the 3rd layer, ISB keeps the cpu from moving forward past it
<geist>
this is why DSB; ISB; is the absolute barrier of the cpu
<heat>
why isn't dmb + isb equivalent?
<heat>
since isb will still wait
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<geist>
gotta think about that for a sec
<geist>
i mean dmb wouldn't interlock with cache ops and whatnot, because it's not defined to
<geist>
i think it would just plow past the dmb and the isb acts as a prefetching stall
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<geist>
ie, the cpu cannoot prefetch/speculate around an ISB until the PC actually arrives at it (ie, it's retired all the instructions)
<heat>
oh yes, the diff would be wrt cache and tlb ops yeah
<zid>
DOSH ALERT
<geist>
but since the DMB doesn't actually wait for memory ops to complete, it simply inserts a sort of before-and-after label on any existing memory ops that havne't completed, it would just keep going past
<heat>
memory barriers man, memory barriers.
<heat>
how out of order are these things anyway?
<heat>
i can't really gauge how much ooo fuckiness these modern cores do
<heat>
i do know x86 is really memory-barrier happy in the sense that the memory model is really forgiving and even a locked atomic implies a full memory barrier
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<geist>
my experience is the M1 cpu (and presumably the later ones) is *extremely* OOO
<geist>
people have documented it and i've found at least one bug in zircon that i could only reproduce on qemu on m1
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<klys>
seems it's rather important when writing a program with involved data structures to have a document that tells all the constraints of those data structures and to read that document before proceeding the next time you work on the project.
<zid>
how dare you be thorough
<heat>
ikr just write the code lol wtf
<klys>
getting into it I had some questions about what those last and next pointers were for and why I had them pointing at adjacent elements. also I was assuming there would only be one trunk structure. it's been a couple of weeks of coding weirdly.
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<demindiro>
1. .pushsection is exactly what I need
<demindiro>
2. precise stack scanning for roots (for tracing GC) is surprisingly easy
<demindiro>
And most importantly: 3. don't forget to initialize your data structures because fuck that was awful to debug
<demindiro>
Macros in GAS are also way nicer than those in C somehow
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<pog>
macros are part of the syntax rather than a preprocessing step
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<heat_>
demindiro, if you compile your .S files with gcc/clang (instead of as) you can get it to preprocess your files
<heat_>
thus the best of both worlds
<demindiro>
nah
<demindiro>
I don't like the C preprocessor
<heat_>
it defines (iirc) __ASSEMBLER__ which you can use to gate off C structs
<heat_>
well, it's very useful for shit you want to share between C and asm
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<nikolar>
demindiro: what are you doing with a gc
<nikolar>
Gc kernel?
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<demindiro>
nikolar: bootstrap interpreter
<nikolar>
What's a bootstrap interpreter
<demindiro>
I intend to add a JIT too, but it will be implemented as another interpreter in the language itself
<demindiro>
The idea is lots of stacked interpreters and JIT optimize them
<demindiro>
And the bootstrap interpreter just a small one written in assembly
<nikolar>
Right
<demindiro>
The semantics of the language should be just right that optimizing it down efficiently should work regardless of how many interpreters you pile on top
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<demindiro>
And yes, I'll use a GC for most services. Tracing GC should work fine if you keep the heap small
<demindiro>
Which shouldn't be too hard if you have many small heaps per "process" a la Erlang
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<heat_>
linux operating system
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<nikolar>
KERNAL
* kof673
narrator: in the lost forest of #osdev, the natives still primitively chant for favour, "kernel, kernel!" they cry out
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<Ermine>
i'd like to interject for a moment
<Ermine>
linux is not an operating system system unto itself
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<gog>
it's acksually gnu plus linux
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<heat_>
uhhhhhh maam i use the gnu operating system aktshually
<Ermine>
gog: use gnu plus onyx
<gog>
gnu plus kjarna
<heat_>
subscribe to gnu plus
<heat_>
your new foss libre documentary streaming service
<Ermine>
drm-free!
<Ermine>
In both senses
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<nikolar>
heat_: is gnu plus google+ but gnu
<Ermine>
more like msn but gnu
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<zid>
gnoogle plus
<nikolar>
zid, copyright that
<zid>
I just did
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<klys>
noogleplus.com sounds like i'm asking for a cat.