_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<MoeIcenowy> josuah: I have no LA
<MoeIcenowy> and I don't know how to let Litescope to handle a signal clocked far higher than sys clock
<MoeIcenowy> I now utilized add_ethernet's software_debug=True parameter, which will print out the packets that the LiteETH MAC receives
<MoeIcenowy> and packets sent from my PC looks okay
<MoeIcenowy> BTW is 100Mbps/10Mbps RGMII SDR?
<MoeIcenowy> is this handled in the LiteETH?
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<whitequark[cis]> RGMII for 10/100 is SDR