08:04 <Melkhior> hello ; is 'make.py' in linux-on-litex-vexriscv still supported ? It seems to be broken right now, csr and irq and region (and maybe more) are added twice, by such commit as e6e3a909f and 3b4a88536

08:06 <Melkhior> e.g. "./make.py --board=arty_a7" --build fails instantly complaining about uart csr being added twice

08:37 <_florent_> Hi Melkhior, it should yes. I've moved the specific things to LiteX (to also allow building Linux-on-LiteX-VexRiscv SoC directly from LiteX-Boards when using --cpu-type=vexriscv-smp)

08:37 <_florent_> but I'm going to check

08:38 <Melkhior> @_florent_: commenting the 5 offending lines in cpu/vexriscv_smp/core.py (2 csr, 2 irq, 1 region) seem to work around the issue for me...

08:42 <_florent_> are you using a linux-on-litex-vexriscv fork?

08:43 <_florent_> if so, make sure to apply:

08:43 <_florent_> https://github.com/litex-hub/linux-on-litex-vexriscv/commit/adfe74c559c0a6e8eb826453e6fd10d6c624ff2f

08:43 <_florent_> https://github.com/litex-hub/linux-on-litex-vexriscv/commit/dec4cb399db6cf3e1f53433f6969946dd224f419

08:43 <_florent_> https://github.com/litex-hub/linux-on-litex-vexriscv/commit/cfb88dd7339ae3690af6f21a16afca0786a960b9

08:55 <_florent_> Melkhior: it builds fine here with up to date LiteX/Linux-on-LiteX-VexRiscv

08:58 <Melkhior> @_florent_ no it should be a clean Litex install just updated by the script

08:58 <Melkhior> ... but maybe I didn't explicitly update linux-on-litex-vexriscv :-/ silly me

10:45 <Melkhior> indeed with an update linux-on-litex-vexriscv it seems OK

11:01 <_florent_> Melkhior: Good, in fact linux-on-litex-vexriscv is now mostly build/use instructions for the gateware/buildroot and pre-configured targets. All the real contents has moved to LiteX or LiteX-Boards.