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<
lvrp16>
bl30 has all of the "security" stuff
<
lvrp16>
a clean implementation with the "security" stuff would be nice
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* f_
magically appears.
<
f_>
lvrp16: I agree about the fact that reimplementing SCP_BL2 would be awesome.
<
lvrp16>
yeah gotta start from somewhere. that's awesome if g12 uses the same ddr controller and the code can be abstracted
<
f_>
According to minute a long time ago, the DDR firmware (not talking about aml_ddr.fw) seem identical
<
f_>
*identical to the iMX8MQ DDR firmware
<
lvrp16>
for g12 or gxl?
<
f_>
I'd assume that gxl works the same way as gxbb, regarding DDR.
<
f_>
And even if it doesn't I can still reverse-engineer the changes made.
* f_
starts getting confused..
<
f_>
A311D is g12 or SM1?
* f_
looks that up.
<
f_>
narmstrong, khilman: linux-meson.com seems to have loaded instantly with no problems!
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<
f_>
So that's great news.
<
f_>
SCP_BL2 however..
<
f_>
I could try making a libre replacement, but then I'm not sure if I'll maintain this.
<
f_>
But...one thing at a time first.
<
f_>
And we also got TF-M, for Cortex-M CPUs.
<
f_>
and a reference implementation of an SCP firmware, from Arm.
<
f_>
But let's do one thing at a time. First, BL2.
<
f_>
And I actually intend to maintain whatever implementation port ends up getting used as BL2.
<
f_>
I'm more going towards using U-Boot SPL as BL2 though. Have any thoughts on that lvrp16 ?
<
f_>
(for me honestly as long as you have something libre that works, it's fine)
<
f_>
Didn't completly understand..sorry
<
f_>
Perhaps you responded to another message.
<
lvrp16>
I don't think it matters either way, only if you are concerned about license
<
f_>
Not really concerned about license.
<
lvrp16>
binman is nice
<
lvrp16>
for loading bl30 and whatever runs on the cortex m0
<
f_>
I like both BSD-3-Clause and GPL-2.0/GPL-3.0, so that's fine.
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<
f_>
>Entry: scp: System Control Processor (SCP) firmware blob
<
f_>
This is exactly what we need.
<
f_>
Also got so much more entries like.....cbfs!
<
lvrp16>
binman is really nice :D simon glass does great stuff
<
f_>
(coreboot file system in SPI flash)
<
lvrp16>
the whole bootstd stuff is sick
<
f_>
U-Boot as a whole is nice.
<
f_>
extremely configurable and extensible.
<
lvrp16>
there's a lot of lower level cleanups needed but most of that is on the vendors
<
f_>
as said before, you don't use it because it works and is libre software, you use it because it's an entire customisable environment.
<
f_>
>Entry: atf-bl31: ARM Trusted Firmware (ATF) BL31 blob
<
f_>
Also got BL31, nice.
<
f_>
So let's use this!
<
lvrp16>
yeah we also have lzma and all kinds of different compression schemes
<
f_>
lvrp16: exactly what you need, right?
<
f_>
IIRC you kept using aml_encrypt_gxl or Amlogic BL31 because of compression
<
f_>
But at this point with U-Boot SPL all you'd have to do is insert a header at the top, just for BL1
<
f_>
Most of that stupid Amlogic FIP nonsense is handled by Amlogic's BL2.
<
lvrp16>
yeah, g12 binaries getting pretty large
<
lvrp16>
i had to strip out all of the unnecessary stuff to fit in our standard scheme
<
f_>
They're getting bloated.
<
lvrp16>
including removing a bunch of u-boot configs we would like
<
lvrp16>
they have a dozen of those large loadable 64K binaries that just eat up space and time
<
f_>
That's much more than the expected size of BL2+BL21 combined.
<
f_>
(assuming that hasn't changed)
<
f_>
The bootrom only loads up to 48K.
<
lvrp16>
this is for g12 only because of the LPDDR4 blobs and what not, they seem to abstract each DDR type's loader
<
f_>
Most of these seem to come from Synopsys
<
f_>
with the exception of aml_ddr.fw which is written by Amlogic.
<
lvrp16>
I wonder why Synopsys just doesn't write a driver for u-boot themselves
<
f_>
(as far as I can tell)
<
f_>
lvrp16: They believe in the 'security by obscurity' 'technique'.
<
lvrp16>
waste of engineering resources
<
f_>
after all, hackers could look at the source code and hack your IP!!1! and you don't want that, right???
<
f_>
But Synopsys stuff is protected by NDA, for sure.
<
lvrp16>
I guess it could be licensing issues
<
f_>
lvrp16: Probably, but I guess we'll never know.
<
lvrp16>
the thing is, you have to validate DDR controller against the foundary process, it's not like anybody can just do that.
<
lvrp16>
you need some serious scale
<
f_>
If Amlogic could make their own IP they probably would
<
f_>
but there's a reason why Synopsys IPs keep getting used by many SoCs, not just Amlogic.
<
lvrp16>
idk if it is feasible to do DDR controller yourself, it would be sucky slow
<
f_>
Synopsys is the big tech of DDR controllers.
<
f_>
Anyway, I must go now.
<
f_>
See you later.
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<
f_>
Amlogic's ddr_init_pctl function is
*huge*
<
f_>
So I'll split it into multiple smaller functions.
<
f_>
Readability :P
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<
lvrp16>
what is pctl?
<
f_>
protocol control I guess.
<
f_>
It inits the PHY and writes timings to some registers.
<
f_>
Seriously, it's huge.
<
f_>
binman is really nice though
<
f_>
Good job Simon Glass
<
lvrp16>
yeah binman is pretty useful
<
lvrp16>
bootstd is great too
<
lvrp16>
thank google for paying him
<
f_>
Thanks to Google most coreboot developers are from Google.
<
f_>
Google is everywhere.
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<
f_>
I'll have to go though. See you later!
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