whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
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<mcc111[m]> Mwaa ha ha Kiryuu Nanami laugh dot gif
<mcc111[m]> I now have Quartus installed on my new Linux laptop and have just successfully done an FPGA build with amaranth!
<mcc111[m]> It turns out a mid-range laptop purchased in october of 2023 is much, MUCH faster at doing FPGA builds than a high-end desktop CPU from 2016.
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<ravenslofty[m]> I don't suppose you've tried out the open tooling yet, have you?
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<mcc111[m]> I haven't explored the open tooling for Altera yet, no.
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<_whitenotifier-f> [amaranth] Kristopher38 opened issue #936: Invalid verilog generated for 0-bit Signals - https://github.com/amaranth-lang/amaranth/issues/936
<_whitenotifier-f> [amaranth] Kristopher38 commented on issue #936: Invalid verilog generated for 0-bit Signals - https://github.com/amaranth-lang/amaranth/issues/936#issuecomment-1771805955
<_whitenotifier-f> [amaranth] Kristopher38 closed issue #936: Invalid verilog generated for 0-bit Signals - https://github.com/amaranth-lang/amaranth/issues/936
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