whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
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<mcc111[m]> Okay. So I will need to set it up to use native yosys?
<whitequark[cis]> yep
<whitequark[cis]> YOSYS=.../path/to/yosys
<mcc111[m]> That doesn't sound so hard
<mcc111[m]> I may not have time until tomorrow however
<_whitenotifier-f> [amaranth] mcclure commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1751876216
<_whitenotifier-f> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://github.com/YoWASP/yosys/compare/a17a45520e8e...97726817a6be
<_whitenotifier-f> [YoWASP/yosys] whitequark 9772681 - Update dependencies.
<mcc111[m]> <Wanda[cis]> "https://github.com/YosysHQ/yosys..."; <- So I downloaded this intending to build the PR and run it... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/vEbmxYmYbitnDtoNjrRHEqoH>)
<whitequark[cis]> yowasp is built by ./build.sh then ./package-pypi.sh
<whitequark[cis]> you just need to update the submodule
<whitequark[cis]> it downloads everything it needs, etc
<mcc111[m]> <whitequark[cis]> "yowasp is built by ./build.sh..." <- hmm, ok
<mcc111[m]> and there would be no awkwardness to building that in linux and then executing it in windows because it's wasm
<mcc111[m]> ?
<whitequark[cis]> nope, the wheel is arch-independent
<whitequark[cis]> in fact the wheels you are using are built by github actions runners on inux
<whitequark[cis]> s/inux/linux/
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<korken89[m]> Since I'm a lazy person and am making a board with ~300 IOs utilized on an ECP5, does anyone have any trick that I can use in KiCAD to somehow simplify export of signals connected for the board definition? Like smart naming or similar :)
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<zyp[m]> I'm not a kicad user, but isn't there a way to export a netlist?
<korken89[m]> Hmm, i think so
<korken89[m]> What's your idea? :)
<zyp[m]> I would expect a netlist export to contain net names and what pins on what parts they're connected to, which means you should be able to filter it to give you the signals connected to the fpga, and if you then sort it by signal name, you should get it in a reasonable order to make it easy to make board definition from it
<korken89[m]> That should make it simpler 👍
<korken89[m]> There are 64 ports that take 4 signals each so with that I can hopefully also group based on the final output port
<korken89[m]> Like using names like PORT_XY_..
<korken89[m]> I'll experiment a bit :)
<mcc111[m]> what do you make of this
<mcc111[m]> experimenting now…
<mcc111[m]> Removing the YOSYS= does not fix it... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/XVeOnltCmoRUvORMVvCoBlrz>)
<mcc111[m]> I'm inclined to post a issue because even if I am doing something wrong this error message is not so good ("spooky action at a distance")
<mcc111[m]> as with last night this is the code I am running https://github.com/mcclure/analogue-core-template-amaranth/tree/control-test (2354a5e, or branch screen-test f055ce0)
<Wanda[cis]> hm.
<Wanda[cis]> interesting.
<Wanda[cis]> and uh.
<Wanda[cis]> oh, python 3.8
<Wanda[cis]> ok let's see
<Wanda[cis]> indeed I can reproduce the fail on 3.8
<Wanda[cis]> huh.
<Wanda[cis]> oh.
<Wanda[cis]> it's... a Python thing
<Wanda[cis]> Python 3.10 creates an empty __annotations__ for classes without annotations, so the second print gives you {}; Python 3.8 does not set __annotations__ at all, so second print gives {"meow": 123}
<Wanda[cis]> and amaranth gets confused, iterating over the base class annotations twice
<Wanda[cis]> okay it seems like an easy fix
<Wanda[cis]> ... and Python 3.9 works like Python 3.8
<_whitenotifier-f> [amaranth] wanda-phi opened pull request #932: lib.wiring: fix `Component.signature` on subclasses without annotations. - https://github.com/amaranth-lang/amaranth/pull/932
<mcc111[m]> Python 3.8.10 is the most recent Python in apt for Ubuntu 20.04.6 LTS, FYI
<Wanda[cis]> mcc111: here goes a PR
<_whitenotifier-f> [amaranth] codecov[bot] commented on pull request #932: lib.wiring: fix `Component.signature` on subclasses without annotations. - https://github.com/amaranth-lang/amaranth/pull/932#issuecomment-1752041497
<mcc111[m]> In this case, I am installing amaranth through pdm. Is there a way to tell pdm "use branch https://github.com/wanda-phi/amaranth/tree/wiring-inherit-fix " ?
<mcc111[m]> (I am looking this up myself in parallel, but)
<mcc111[m]> [tool.pdm.overrides] ?
<Wanda[cis]> idk, I never used pdm >_>
<Wanda[cis]> maybe I should
<Wanda[cis]> (I'm a cavecatgirl using venv manually)
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<cr1901> mcc111[m]: Idk if tool.pdm.overrides allows local deps. You put local deps into tool.pdm.dev-dependencies "amaranth @ file:///path/to/amaranth"
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<cr1901> And then "pdm update". Every time you check out a new commit, you have to do "pdm update" to refresh its copy of the local dep.
<mcc111[m]> ok. i was trying to do a github branch not a local dep. but i figured it out
<mcc111[m]> <Wanda[cis]> "mcc111: here goes a PR" <- Wanda, I can't find your PR. I thought I saw it a moment ago but now I can't find it.
<mcc111[m]> I can confirm the PR fixed the problem.
<mcc111[m]> I see the branch but not the PR.
<Wanda[cis]> the yosys PR or the amaranth PR?
<Wanda[cis]> the yosys one is already merged
<mcc111[m]> wait sorry i see it now
<mcc111[m]> i am currently 4 levels deep in the stack
<mcc111[m]> while attempting to test your pr i found a bug in pdm and while trying to debug that i found a second bug in pdm
<Wanda[cis]> ... I see you found a nice hairy yak
<mcc111[m]> yak :(
<_whitenotifier-f> [amaranth] mcclure commented on pull request #932: lib.wiring: fix `Component.signature` on subclasses without annotations. - https://github.com/amaranth-lang/amaranth/pull/932#issuecomment-1752048557
<mcc111[m]> it is having a negative impact on my focus
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<_whitenotifier-f> [amaranth] mcclure commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752050153
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<Wanda[cis]> thanks for testing
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<Muddassir_Ali> Hello hope you guys are fine
<Muddassir_Ali> I have a project-related processor using the Amaranth language RV32IMC...
<Muddassir_Ali> so please guide me on where can I find stuff to learn the basics of Amaranth and other reading materials?
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<galibert[m]> There’s an amaranth rv32imc? Minerva is rv32im, not c
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<Muddassir_Ali> galibert[m] mean c can not be implemented in Amaranth?
<galibert[m]> Of course it can. I just means that afaik it’s not done yet
<galibert[m]> I didn’t fully understand what you say, you mean you want to develop a rv32imc core using amaranth?
<Muddassir_Ali> exactly
<galibert[m]> Ok, very interesting project
<Muddassir_Ali> so i want to learn Amaranth
<Muddassir_Ali> I have done RV32I in verilog
<galibert[m]> I’m on my phone so I don’t have the links handy but the doc if good even if incomplete and you can find some nice tutorials
<galibert[m]> Plus you’re always welcome to ask questions here
<Muddassir_Ali> thanks means alot
<Muddassir_Ali> muddassiraliofficial@gmail.com Please share the doc here
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<mcc111[m]> Say I have a long signal, 8 bits or something. And I have a second signal of a single bit. And I want to assign ALL bits of the first signal to the single value of the second signal. There's nothing like a… I dunno, a `signal_name[..].eq(signal_name_2)` is there?
<mcc111[m]> I guess what I really want to be doing is `signal_name_2.replicate`? Is there such a thing as a "replicate to fill"?
<galibert[m]> There was Repl but I think it got removed
<galibert[m]> There’s the kinky signal_name.eq(signal_name_2.as_signed())
<galibert[m]> There’s the boring but actually understandable signal_name.eq(Mux(signal_name_2, 0xff, 0x00))
<galibert[m]> I’d go for boring
<galibert[m]> Pretty certain the final fpga netlist will be the same
<adamgreig[m]> mcc111: yes, literally `signal_name.eq(signal_name_2.replicate(n))`
<adamgreig[m]> galibert: Repl was deprecated, but not yet removed, and the deprecation note is "instead of `Repl(value, count)`, use `value.replicate(count)`"
<adamgreig[m]> * mcc111: yea, replicate, maybe like `signal_name.eq(signal_name_2.replicate(signal_name.width))`
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<gatin00b[m]> So, official documentation still recommend pip, maintainers say use pdm, quite unsure how to proceed with that.
<zyp[m]> I think the change to pdm is fairly recent, so the documentation haven't had time to catch up yet
<gatin00b[m]> My understanding is that amaranth-boards still uses pip though, right?
<adamgreig[m]> Either should work though. I use poetry without incident
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<gatin00b[m]> Ok, then I'll use whatever is documented, seems fair
<adamgreig[m]> plain pip will installation amaranth for your whole user, so it's worth using some sort of per-project virtualenv, whether that's a bare venv or pipenv or poetry or pdm
<adamgreig[m]> But they're mercifully fairly cross compatible
<adamgreig[m]> I suspect the advice for "how to set up a new project that used amaranth" will suggest pdm and it's not a bad choice, but at the end of the day it's a python library and there's a bunch of choices for how to manage them
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<bob_twinkles[m]> There's the work-in-progress https://github.com/amaranth-lang/template-fpga
<bob_twinkles[m]> Which I think is the direction people are encouraged to move in
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<sporniket> Regarding pdm vs pip, I did migrate recently, as pip-ing amaranth was not working anymore after some times. Anyway I am working on it to have more OS independant scripts.
<sporniket> whitequark[cis] also pointed me towards using yowasp versions of yosys & nextpnr to avoid compiling and installing from source.
<sporniket> I am doing tests and will write a followup about that soon.
<sporniket> I tried to run my build on windows using MSYS2 tooling and was quite disappointed. I need to test with native environment now.
<sporniket> I will be able to test on MacOS too.
<sporniket> (I expect less trouble there)
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<galibert[m]> Note that pip install —user of all amaranth works perfectly well for me, so ymmv
<mcc111[m]> I've tried a couple different things and I recommend moving over to pdm because you'll find it's more flexible for things such as moving to unusual environments, switching to a newer/PR version of amaranth quickly etc
<gatin00b[m]> Yeah, the pip install wasn't working on msys2 either, currently installing other dependencies, will come back to when I get time
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<ldcd[m]> I noticed while checking to make sure that that there's an Elif, I noticed that there's an FSM construct, is it documented anywhere and if not is there anything I should read before attempting to write some documentation
<adamgreig[m]> I don't believe it's currently documented and also I don't think documentation contributions are being asked for at the moment
<adamgreig[m]> there is a basic worked example here though: https://github.com/amaranth-lang/amaranth/blob/main/examples/basic/fsm.py
<_whitenotifier-f> [amaranth] mcclure commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752168072
<ldcd[m]> Because the FSM API is potentially still in flux with the new Enums or something more general about docs contributions?
<gatin00b[m]> The issue seems to be with setuptools-scm? commenting out... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/vmqUVWSKzEJXwEqUqaITNcOj>)
<whitequark[cis]> <ldcd[m]> "Because the FSM API is potential..." <- more general about docs contributions; the effort to review and align them would exceed the effort to write them from scratch, therefore no point in accepting them
<whitequark[cis]> gatin00b: what's not working exactly?
<gatin00b[m]> On msys2, build fails with:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/IUfmfmpukAtMzqrjdOZwZHrq>)
<_whitenotifier-f> [amaranth] whitequark commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752181104
<gatin00b[m]> And there's not a whole lot to guide how to solve this
<whitequark[cis]> ah that's interesting
<whitequark[cis]> it seems like pdm has bugs when run on msys2
<whitequark[cis]> I've never used msys2 (I either use a native Windows install or a WSL install) so I can't tell you much here
<whitequark[cis]> is there a reason one of the other two options doesn't work for you?
<gatin00b[m]> Native windows is icky, but still need access to usb devices (can't be done through WSL as far as I know)
<whitequark[cis]> <gatin00b[m]> "So, official documentation still..." <- you can use either pip or pdm; they are built on top of same or similar technology but use a different user interface
<whitequark[cis]> I'm not sure I understand what's "icky" about it; you are running Windows after all, no?
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<tuxfool[m]> You can access usb devices in wsl using usb ip
<whitequark[cis]> in general Amaranth strives to provide a first-class experience under Windows but I don't think anyone regularly tests it under MSYS2
<whitequark[cis]> and yes, what tuxfool says
<whitequark[cis]> it's WSL 2 only
<gatin00b[m]> I'd rather not have to go back and forth multiple work environment. I used to be on cygwin, people complained, moved to msys2, people still complain...
<whitequark[cis]> I consider both cygwin and msys2 legacy platforms to be honest, mainly waiting for them to disappear so I never have to care about them again
<whitequark[cis]> especially cygwin
<gatin00b[m]> I use Windows for other reasons than just dev. Yes I can get around using other tools, but...
<_whitenotifier-f> [amaranth] wanda-phi commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752182157
<mcc111[m]> I'm running WSL1, I run Amaranth on the Windows-side python, I just run python.exe when I run it, it works fine. The papercuts (can't build my own bespoke yosys easily, paths are suddenly different in one of the programs I'm running) are only papercuts.
<mcc111[m]> That msys2 error is… suspicious. Are you sure you aren't running in the "wrong one" of the three msys2 environments?
<gatin00b[m]> Yeah, I get it it's a pain for maintainers, but wsl is/was a huge pain for the longest time
<mcc111[m]> Also, are you running in /c/ or in the msys2 folders?
<tuxfool[m]> I pretty much use wsl2 exclusively
<mcc111[m]> mcc111[m]: > <@mcc111:matrix.org> I'm running WSL1, I run Amaranth on the Windows-side python, I just run python.exe when I run it, it works fine. The papercuts (can't build my own bespoke yosys easily, paths are suddenly different in one of the programs I'm running) are only papercuts.... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/xTqLVlhtJHWWXfCLsAYbXVLf>)
<whitequark[cis]> it's less that it's a pain and more that I simply do not consider either Cygwin or MSYS2 in scope for Amaranth
<whitequark[cis]> we have a limited amount of resources and only so much of them can be spent supporting esoteric platforms
<gatin00b[m]> Fair, not a problem, mostly there to report it.
<gatin00b[m]> In the end, I built it. It likely works and once I generated the verilog file, I don't need Amaranth anymore
<_whitenotifier-f> [amaranth-lang/amaranth] github-merge-queue[bot] pushed 1 commit to gh-readonly-queue/main/pr-932-c7da6c1292ea60a612ee9fd0f75d603485939580 [+0/-0/±2] https://github.com/amaranth-lang/amaranth/commit/470477a88f02
<_whitenotifier-f> [amaranth-lang/amaranth] wanda-phi 470477a - lib.wiring: fix `Component.signature` on subclasses without annotations.
<_whitenotifier-f> [amaranth] github-merge-queue[bot] created branch gh-readonly-queue/main/pr-932-c7da6c1292ea60a612ee9fd0f75d603485939580 - https://github.com/amaranth-lang/amaranth
<whitequark[cis]> Wanda: I've set notifico to only post about the `main` branch
<whitequark[cis]> and same for glasgow
<whitequark[cis]> ideally we would have globs or something but this will do for now
<_whitenotifier-f> [amaranth] whitequark commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752183491
<_whitenotifier-f> [amaranth] wanda-phi commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752183614
<Wanda[cis]> whitequark[cis]: thanks, let's see how this works
<_whitenotifier-f> [amaranth] whitequark commented on issue #931: Amaranth emitted invalid Verilog (Amaranth conditionals containing only comb assignments results in Verilog "empty case" error) - https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752184124
<_whitenotifier-f> [amaranth-lang/amaranth] github-merge-queue[bot] pushed 1 commit to main [+0/-0/±2] https://github.com/amaranth-lang/amaranth/compare/c7da6c1292ea...470477a88f02
<_whitenotifier-f> [amaranth-lang/amaranth] wanda-phi 470477a - lib.wiring: fix `Component.signature` on subclasses without annotations.
<_whitenotifier-f> [amaranth] whitequark closed pull request #932: lib.wiring: fix `Component.signature` on subclasses without annotations. - https://github.com/amaranth-lang/amaranth/pull/932
<_whitenotifier-f> [amaranth] github-merge-queue[bot] deleted branch gh-readonly-queue/main/pr-932-c7da6c1292ea60a612ee9fd0f75d603485939580 - https://github.com/amaranth-lang/amaranth
<mcc111[m]> Catherine: Re comment here https://github.com/amaranth-lang/amaranth/issues/931#issuecomment-1752184124 — yowasp pulls in yosys master, right? So all I have to do is wait a day and there will be a yowasp version in pip I can pin my local project to if I need the PR?
<_whitenotifier-f> [amaranth-lang/amaranth-lang.github.io] whitequark pushed 1 commit to main [+0/-0/±32] https://github.com/amaranth-lang/amaranth-lang.github.io/compare/e87d4d6387af...8579e3399d22
<_whitenotifier-f> [amaranth-lang/amaranth-lang.github.io] github-merge-queue[bot] 8579e33 - Deploying to main from @ amaranth-lang/amaranth@470477a88f02dfc4af7452ad05c4c067f72cd0bd 🚀
<whitequark[cis]> mcc111: it's more complicated: if I built each commit from yosys master and pushed it to PyPI I would run out of disk space quota on PyPI
<whitequark[cis]> so only releases and manual builds appear on PyPI; everything else gets uploaded nightly to TestPyPI
<whitequark[cis]> which is a different repository where they sometimes wipe the entire thing (whenever they feel like) and where I can afford to waste space without worrying that when I have to delete artifacts it'll screw everyone over
<whitequark[cis]> mcc111: probably the easiest way is for me to just kick off a YoWASP build manually
<mcc111[m]> whitequark[cis]: okay. would that be an imposition?
<mcc111[m]> if i'm left having to wait to regularize my amaranth builds (i'm right this second using a custom built yosys) longer than… say, past the 16th, it will become a source of difficulty for me
<whitequark[cis]> no, this is within policy
<whitequark[cis]> let me just do that right now
<mcc111[m]> thanks
<mcc111[m]> I am in the woods (non metaphorical) for much of the next two weeks
<whitequark[cis]> https://github.com/YoWASP/yosys/actions see this tab?
<whitequark[cis]> when it's done building on the develop branch it'll automatically kick off a build on release branch
<whitequark[cis]> whenever that build finishes you will have an artifact on pypi with the version of, let me see
<whitequark[cis]> 0.34.0.9.post594.dev0
<mcc111[m]> Ok, I will test that, like, Tomorrow
<whitequark[cis]> (it's complicated. just pin this specific version. it'll be there in like 3 hours)
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