<johnnyfisher[m]>
As we make single cycle memory that's we want our memory and read and write at the same clock cycle but it does'nt happen as you can see in the attached picture.
<johnnyfisher[m]>
What's the solution for that?
<johnnyfisher[m]>
That's why we want our memory to read and write at the same time*
<whitequark[cis]>
maybe you want a transparent read port?
<johnnyfisher[m]>
?
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<alinaqvi>
Kindly tell me how to make a register file Should i make it using reg= Memory() like i did in memory, Or should i use list (32×32)
<_whitenotifier>
[amaranth-lang/amaranth-lang.github.io] github-merge-queue[bot] e2c04e4 - Deploying to main from @ amaranth-lang/amaranth@1c3227d95626f9c7bd11c82da9d2f760113a4589 🚀
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