azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
<gruetzkopf>
PCI still isn't that hard, you can run most cards hat like 2Hz bus clock
peeps is now known as peepsalot
Degi_ has joined ##openfpga
Degi has quit [Ping timeout: 248 seconds]
Degi_ is now known as Degi
<pie_>
gruetzkopf: ah haha ok, I didnt know if I need to run at the maximum pcie 1.0 1x clock listed on wikiepdia :p