azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
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<pie_> is there any introductory reading / tool I can use to figure out whether I can implement something on an fpga faster than using a gpu or cpu?
<pie_> I guess its basically a question of parallelization, but then GPUs seem like they would win out
<pie_> except for embdedded applications that are power and or space constrained
<tpw_rules> my personal checklist is if it involves high speed i/o
<tpw_rules> not that i am a master of the arts
<somlo> pie_: if you're at uni, then taking a digital design course (the kind where they do k-maps, gates, stuff like that) would probably make the most sense as a first pass. The book (haven't used it myself, but the Internet collectively seems to agree it's the best one) would be https://www.amazon.com/Digital-Design-M-Morris-Mano/dp/013212937X
<pie_> Thanks!
<pie_> tpw_rules: the reason this came up was because in on of my classes today, someone mentioned the GIMPS project which searches for mersenne primes
<somlo> if you can come up with an optimized path for your data and computations to "flow" through combinational and sequential logic (gates, flip-flops, clocks, etc) then it's going to be "faster" than opcodes running on a cpu or gpu
<pie_> https://en.wikipedia.org/wiki/Lucas%E2%80%93Lehmer_primality_test is apparently what they use for doing it
<somlo> "faster" depends on your clock, but in terms of algorithm efficiency :)
<somlo> and at that point, the difference between ASIC and FPGA is just how optimized that implementation is, how much power it uses, etc
<pie_> "The inner loop of the primality test is a large FFT, which is theclassic non-streaming task, done in double-precision floating point, which is another thing at which generic computers are significantly better than FPGAs."
<somlo> and obviously, scaling (the "market" kind, I mean: stick with FPGAs if you plan on "deploying" hundreds of "units", go for ASIC if you want to scale up to thousands, that sort of thing)
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<pie_> aha right
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