ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<somlo> trying to build yosys v13 for Fedora (with mock), and `make manual` fails: https://pastebin.com/59mWyg6X
<tpb> Title: ...make[1]: Leaving directory '/builddir/build/BUILD/yosys-61324cf55fc5c523716 - Pastebin.com (at pastebin.com)
<somlo> I can open a github issue, but wondering if more details would be preferred beyond just "it breaks when I run make manual, here's the log" :)
<somlo> if so, any advice appreciated, TIA
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<sagar_acharya> Sarayan: Are you there?
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<sagar_acharya> What is a monochrome digital signal? wrt video output signal?
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<xiretza[m]> <sagar_acharya> "What is a monochrome digital..." <- you have a single bit of video data, aka monochrome
<xiretza[m]> if you want 0 to be black and 1 to be white, you need to hook it up to all the VGA color bits
<sagar_acharya> How do I convert it to rgb
<sagar_acharya> Aah alright
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<xiretza[m]> you can also hook it up to any other combination of color bits for funkier colours than white ;)
<sagar_acharya> For now, I'll just go with b&w but so, it runs across complete screen and assigns it rgb?
<sagar_acharya> So, if I just assign rgb values of black to 0 of video and rgb values of white to 1 of video signal
<sagar_acharya> That should do it right?
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<xiretza[m]> if I understood you correctly, that should do it
<sagar_acharya> xiretza: ok, on it, thanks.
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<sagar_acharya> I have this iCE40HX8KPinout.ods
<sagar_acharya> And I have the above pin diagram for VGA. How do I determine which port of vga is connected to which pin?
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<Sarayan> you're missing the board schematic that tells you which fpga pin goes to which gpio pin
<lambda> they disconnected
<Sarayan> true, damn
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<lambda> sagar_acharya: welcome back
<lambda> still stuck?
<sagar_acharya> yes
<lambda> let's take VGA_BLUE1 for example. From the iCE40-IO schematic, you can see it's connected to pin 26 on the extension header. Then you look at the schematic for your board (https://github.com/OLIMEX/iCE40HX8K-EVB/blob/master/HARDWARE/REV-B1/iCE40HX8K-EVB_Rev_B1.pdf), which tells you that pin 26 on the extension header is connected to PIO3_19/IOL_10B, and if you follow that (19th pin on bank 3), it's
<lambda> connected to ball F1 on the FPGA - that's your ball number. Could've also done that last step with your spreadsheet, it tells you that IOL_10B is ball F1.
<sagar_acharya> I got the first part. Thanks a lot.
<sagar_acharya> I don't get 19th pin on bank 3
<sagar_acharya> I have the sheet, so what is ball, bank and those codes DPIO?
<sagar_acharya> What do they mean.
<sagar_acharya> ?
<sagar_acharya> I'll just assume ball is another name for pin
<lambda> your FPGA is in a BGA package - it doesn't have pins, it has a grid of balls
<sagar_acharya> What is BGA?
<tpb> Title: Ball grid array - Wikipedia (at en.wikipedia.org)
<sagar_acharya> Alright nice, got it.
<sagar_acharya> I would just call them 2D small pins though
<sagar_acharya> They're just metal contacts in my view.
<sagar_acharya> Unnecessary added nomenclature here by some folk.
<lambda> sure, whatever, I'm just trying to not get them confused with the pins on the expansion header :p
<sagar_acharya> Alright! :D , got it!
<sagar_acharya> lambda: Thanks man!
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<ikskuh> heya o/
<ikskuh> is it okay to ask people here for reviewing my code? i don't need a in-depth analysis or whatever, but just some eyeballing for low hanging fruits
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<lofty> ikskuh: sure
<ikskuh> ah, very nice <3
<ikskuh> i'll ask again when i'm done with what i'm doing right now
<ikskuh> how typical is a non-clocked process?
<lofty> ikskuh: combinational processes are pretty common for obvious reasons.
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<ikskuh> ah
<ikskuh> so implementing a mux4 would probably a good choice for a process then?
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<sagar_acharya> This has 9 outputs of 3 bit 3 rgb values.
<sagar_acharya> However, vga cable has just 3 connectors for rgb.
<tpb> Title: VGA connector - Wikipedia (at en.wikipedia.org)
<sagar_acharya> Are they sent serially?
<sagar_acharya> And above schematic shows that the line passes through 3 different registers of 470, 1k and 1.8k units.
<sagar_acharya> I don't get this!
<tnt> it's a basic resistor DAC.
<Sarayan> resistors, not registers
<Sarayan> vga r/g/b is analog, these resistor dacs given you 8 analog levels
<sagar_acharya> sorry yeah resistors
<sagar_acharya> I meant resistors there
<sagar_acharya> Ah alright.
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<sagar_acharya> Wooh, I got a blinking cursor folks!
<sagar_acharya> I still can't get any input from keyboard though!
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<somlo> re. broken `make manual` (https://pastebin.com/59mWyg6X) -- I have opened issue 3156 with steps to reproduce;
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