ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<sagar_acharya> Hello folks. I was trying to understand rv32 picosoc
<sagar_acharya> hx8k demo. I have Olimex HX8K board which is different from the starter board for which this is made.
<sagar_acharya> *Breakout Board
<sagar_acharya> What would I have to do different for Olimex Board?
<sagar_acharya> Can people listen to me?
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<ikskuh> heya sagar_acharya o/
<ikskuh> i guess you have to adjust some pins? i don't know both of these boards, but they both have an ICE40, right?
<sagar_acharya> Yes
<sagar_acharya> I'll manage pcf.
<sagar_acharya> That's it, everything else stays same?
<ikskuh> i guess so? maybe you need to adjust to different clock sources
<ikskuh> for that you have to look up the schematic
<sagar_acharya> ok. I don't understand soc. I understand rv32 though.
<sagar_acharya> So can I use C code on it?
<sagar_acharya> With soc. I'm trying to create basic shell with ps2 keyboard, vga, character encoding and rv32 core for running programs
<sagar_acharya> breakout board has 12MHz oscillator and olimex board has 100MHz. Keeping clock same should be fine right
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<ikskuh> ah, so you're a beginner when it comes to hw dev?
<sagar_acharya> Yes
<sagar_acharya> I know some basics though.
<tnt> I seriously doubt the hx8k is going to run the picorv32 at 100 MHz, you'll need to PLL that down.
<sagar_acharya> Where is the clock signal, I just see input clk
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<sagar_acharya> or is clk a keyword.
<tnt> ??? well yeah, 'clk' is the clock signal ....
<tnt> it's not a keyword, it's just a random name.
<tnt> but that's linked with the pcf to a specific pin of the fpga where the board inputs a clock signal.
<sagar_acharya> Aah ok
<sagar_acharya> Thanks
<sagar_acharya> That makes sense now
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<ikskuh> what's the way-to-go to figure out of an addition overflowed?
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<tnt> just extend the signals by 1 bit before addition.
<ikskuh> ah, perfec
<ikskuh> so
<ikskuh> assign {carry, res} = { 1'b0, a } + { 1'b0, b }; ?
<tnt> yeah, for unsigned addition at least.
<ikskuh> oh right, for signed i have to do sign extension, right?
<tnt> well, not for just checking for overflow IIRC, but the condition is different, tbh I don't remember like that, you'd need to go through the various cases on paper and see how it works out.
<ikskuh> dang. i knew putting carry in was a bad idea ^^
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