ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
tpb has quit [Remote host closed the connection]
tpb has joined #yosys
citypw has joined #yosys
modwizcode has joined #yosys
cr1901_ is now known as cr1901
nelgau_ has quit [Remote host closed the connection]
nelgau has joined #yosys
nelgau has quit [Ping timeout: 256 seconds]
cr1901 has quit [Remote host closed the connection]
cr1901 has joined #yosys
bl0x_ has quit [Ping timeout: 240 seconds]
bl0x_ has joined #yosys
nelgau has joined #yosys
smkz has quit [Quit: smkz]
smkz has joined #yosys
nelgau has quit [Remote host closed the connection]
FabM has joined #yosys
FabM has joined #yosys
FabM has quit [Changing host]
nelgau has joined #yosys
krispaul has quit [Read error: Connection reset by peer]
krispaul has joined #yosys
nelgau has quit [Remote host closed the connection]
nelgau has joined #yosys
nelgau has quit [Remote host closed the connection]
<lambda> ikskuh: very pretty!
promach[m] has joined #yosys
emilazy has joined #yosys
xiretza[m] has joined #yosys
sadoon_albader[m has joined #yosys
jryans has joined #yosys
CarlosEDP has joined #yosys
diadatp has joined #yosys
pepijndevos[m] has joined #yosys
jevinskie[m] has joined #yosys
<ikskuh> thanks :)
<ikskuh> the cool part is yet to come
levalicious[m] has joined #yosys
FL4SHK has quit [Ping timeout: 260 seconds]
FL4SHK has joined #yosys
vidbina has joined #yosys
krispaul has quit [Quit: WeeChat 2.3]
kristianpaul has joined #yosys
lumo_e has joined #yosys
vidbina has quit [Quit: vidbina]
vidbina has joined #yosys
nelgau has joined #yosys
nelgau has quit [Ping timeout: 240 seconds]
citypw has quit [Ping timeout: 276 seconds]
cr1901 has quit [Remote host closed the connection]
cr1901 has joined #yosys
lumo_e has quit [Ping timeout: 240 seconds]
vidbina has quit [Ping timeout: 240 seconds]
gsmecher has joined #yosys
nelgau has joined #yosys
kraiskil has joined #yosys
lumo_e has joined #yosys
kraiskil has quit [Ping timeout: 268 seconds]
vidbina has joined #yosys
nelgau has quit [Remote host closed the connection]
lumo_e has quit [Ping timeout: 240 seconds]
lumo_e has joined #yosys
nelgau has joined #yosys
vidbina has quit [Ping timeout: 256 seconds]
lumo_e has quit [Ping timeout: 240 seconds]
ec_ has joined #yosys
ec_ is now known as ec
lumo_e has joined #yosys
FabM has quit [Ping timeout: 240 seconds]
vidbina has joined #yosys
nelgau_ has joined #yosys
nelgau has quit [Read error: Connection reset by peer]
nelgau has joined #yosys
kristianpaul has quit [Quit: WeeChat 2.3]
kristianpaul has joined #yosys
kristianpaul has joined #yosys
kristianpaul has quit [Changing host]
nelgau_ has quit [Ping timeout: 240 seconds]
vidbina has quit [Ping timeout: 240 seconds]
nelgau has quit [Remote host closed the connection]
nelgau has joined #yosys
nelgau has quit [Ping timeout: 240 seconds]
vidbina has joined #yosys
chaoticryptidz has joined #yosys
nelgau has joined #yosys
machinehum has joined #yosys
<machinehum> Hello
<ikskuh> heya o/
kristianpaul has quit [Quit: WeeChat 2.3]
kristianpaul has joined #yosys
kristianpaul has joined #yosys
kristianpaul has quit [Changing host]
vidbina has quit [Ping timeout: 256 seconds]
<chaoticryptidz> hewwo
<machinehum> Anyone have an idea as to the feasibility to a USB3 memory controller on iCE40-HX8K? Like something you would find on a USB flash drive?
<machinehum> Or possibly USB2, I think that's a little more reasonable
<tnt> USB3 ... not going to happen.
<tnt> USB2, I don't see any major issues, you're going to need an external PHY for the USB2 High-speed, but implementing some basic usb storage backed by flash seems very doable.
<ikskuh> yeah, i'd say the same
<ikskuh> hm, i wonder if it is possible to create raw DVI signals with the ECP5
<ikskuh> if my calculations are correct, i'd need to emit data with 400 MHz
<ikskuh> (for 40 MHz pixel clock)
<tnt> yes. It's been done.
<ikskuh> uuuh
<ikskuh> crazy
<ikskuh> i wanted to use a TFP410PAP for this
<tnt> Not really. It's not 400 MHz, it's 400 Mbps, so with DDR output it's really only "200 MHz".
<ikskuh> i have 30 bit per pixel
<ikskuh> in 3 channels
<ikskuh> so 10 bits per pixel clock
vidbina has joined #yosys
<tnt> yes, but the io register can output on both rising and falling edge of the internal clock.
<ikskuh> oh
<ikskuh> i'm a newbie, so i'm still learning things
<ikskuh> is it legal to run a process with always @ (posedge clk, negedge clk) ?
<tnt> No
<tnt> (well .. not if you want it to be synthesizable at least)
<ikskuh> so how can i do DDR then?
<tnt> You need to instanciate black boxes blocks that represent the specific ECP5 hardware IO register.
<ikskuh> ah
<tnt> ODDRX1F for instance
<ikskuh> what exactly is that?
vidbina has quit [Ping timeout: 240 seconds]
nelgau has quit [Remote host closed the connection]
nelgau has joined #yosys
peeps has joined #yosys
peeps[zen] has quit [Ping timeout: 260 seconds]