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<paulbarker>
Hey folks. I'm planning to upstream CPU reset support for the Renesas RZ/G2L board. Am I right thinking a sysreset driver is preferred these days over implementing reset_cpu() in the board directory?
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<Tartarus>
Yeah
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<paulbarker>
Ok cool. I think `drivers/power/pmic/rk8xx.c` is a good example of what we'll have, a pmic device with a sysreset child device
<Clamor>
paulbarker: are you making pmic's sysreset or soc?
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<paulbarker>
Clamor: The pmic controls the reset line to the soc
<paulbarker>
As well as controlling the power rails
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<Clamor>
Hm, interesting
<paulbarker>
Clamor: The SoC won't have its own sysreset driver as it doesn't have an internal way to trigger a reset
<paulbarker>
Well, it can put the Cortex-A cores into reset, but there's nothing to take them back out of reset automatically
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<marex>
paulbarker: PMIC WDT ? :)
<marex>
paulbarker: isnt that sysreset driver just calling SMC to PSCI from TFA ?
<paulbarker>
marex: Not on this board sadly
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<marex>
paulbarker: not a fan of TFA, so, good
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<rfs613>
I'm not familiar with the RZ/G2L so it may be totally different ;-)
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<paulbarker>
rfs613: The RZ/G2L handles the module resets differently, they're in the CPG along with the clock control and there's no self-clearing reset we can trigger
<paulbarker>
It looks like you can run some code on the Cortex-M cores that would reset the Cortex-A cores, but we can't rely on that as a generic solution in u-boot
<paulbarker>
So reset via the PMIC it is
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