sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<xypron> jrtc27: riscv-elf-psabi-doc does not define the size of enums. The Procedure Call Standard for the ARM 64-bit Architecture states that the size of enumeration types must be at least 32 bits. To guarantee binary compatibility wouldn't such a clarification also make sense for the RISC-V ABI?
<xypron> E.g. the UEFI standard uses enums in the API specification.
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<jrtc27> xypron: hm, I thought C defined enums as int, but not quite, it says "Each enumerated type shall be compatible with char, a signed integer type, or an unsigned integer type"
<jrtc27> so yeah we should specify it's the (sane) choice of signed integer
* jrtc27 wonders if there are any implementations out there still that do anything else...
<xypron> jrtc27: some compilers have flag to use shorter integers than 32 bit if possible
<jrtc27> -fshort-enum is a standards-violating option
<jrtc27> (as well as ABI breaking)
<jrtc27> hm though the standard says "a(n) (un)signed integer type", not int
<xypron> jrtc27: I think our ABI spec should specify enums are 32bit if that fits all values. Otherwise 64bit
<jrtc27> so maybe short/long/long long are valid...
<xypron> jrtc27: an unsigend integer type: uint16_t, uint8_t?
<jrtc27> well those aren't primitive types
<xypron> jrtc27: call them unsigned char and unsigned short.
<xypron> jrtc27: to which mailing list should a patch for the ABI be sent?
<jrtc27> no mailing list, github pr or issue
<xypron> jrtc27: will do
<jrtc27> thanks
<jrtc27> though you might want to hold off on actually writing the patch until I've merged the big split-up-into-multiple-documents-and-convert-to-asciidoc-pr
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<xypron> jrtc27: https://github.com/riscv/riscv-elf-psabi-doc/pull/209 Sorry just read your message.
<jrtc27> eh it's a small diff, easy to rebase
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<xypron> jrtc27: just pushed a new version
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