klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
<heat> mjg, mjg
<mjg> wat
<heat> mjg
<mjg> i'm busy shitting on something
<heat> ok nerd i'm not kinkshaming your scat fetish
<bnchs> inb4 i walk into osdev, talking about scat fetish
<bnchs> okay bye!
<mjg> heat: your mom introduced me to it
<mjg> heat: she has a... weird taste
<mjg> so there is this funny scheduler rolling with most pritmitive approach you can think of: round-robin
<moon-child> heat: mjg
<mjg> it happens to outperform something else, which has weird perf bugs
<mjg> i tried to measure schedling latency but can't convince dtrace to keep up
<heat> is that first one SCHED_4BSD
<mjg> yes
<mjg> anyhow the stats i did manage to obtain show over order of magnitude higher scheduling latency for the latter
<heat> isn't that a multilevel feedback queue
<mjg> as in time from showing up on runqueues to actually getting on cpu
<heat> fwiw doing round robin in a multilevel feedback queue isn't weird
<mjg> this one round robins across all cpus
<mjg> 0 affinity
<heat> i do believe that most systems not named Linux do use such a scheme
<mjg> or ht consideration
<heat> huh?
<mjg> it is a UP scheduler which got added provisional SMP support in early 200s
<heat> thread 1 slice 0 runs on cpu0, thread 1 slice 1 runs on cpu1, etc?
<mjg> before the new scheduler showed up
<heat> or does it have a global thread list?
<heat> is that what you mean?
<mjg> it has a global runq list, but it does not push stuff around in the most primitive case
<heat> i do find it super counter intuitive to have a global runq
<heat> you need to go to weird lengths to not have a locking disaster there
<heat> i guess you could offset the scheduler tick by some amount for each CPU, and that could help, but then irq latency, etc
<mjg> first i'm going to get a full picture of what's going on, which demands i fix some bugs :/
<EthicsGradient> mjg: F
<heat> damn, you failed the class
<mjg> i'm gonna enroll in different community college
<mjg> anyhow there is botched assumptions all over
<heat> capabilities are super unusable
<heat> finally overrode my chrome flatpak's filesystem permissions
<heat> i couldn't take the stupid ENOENTS due to sandboxing anymore
<mjg> :]
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<gog> hi'
<Ermine> hi gog, may I pet you
<gog> yse
* Ermine pets gog
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* gog prr
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<jimbzy> yo
* kazinsal gives gog scritchies
<gog> hihi
* gog prr
<lav> nya
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<zid> lav is some kind of summoner
<kazinsal> we're entering the fractal catgirl dimension
<kazinsal> the deeper you go the more headpats you have to give
<zid> I tried to write a rust progrma yesterday, I got 2 seconds in before getting stuck
<zid> The example uses () as a parameter to a function
<mjg> i looked at rust after few months
<mjg> forgot how atrocious the syntax is
<kazinsal> I'd like to learn how to rust
<kazinsal> what with my eventual plan to write a new, more performant kernel core and bolt my other crap onto it it would make sense to use a fancy modern systems programming language that does memory safety stuff
<kazinsal> if the language can help stop me from writing horrible overflow bugs and shit it's probably a good language
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<mjg> php has this property and is a great counter example
<mjg> :X
<zid> Wrapping all your array accesses in pascal checky stuff also does the same thing
<zid> rust just does that for you
<kazinsal> careful, we're nearing april fools
<kazinsal> someone might decide to write a bootloader in PHP
<mjg> or an os in rust
<zid> OS in rust seems easier than a program in rust
<zid> no need to return anything from mai
<zid> main
<nortti> < kazinsal> someone might decide to write a bootloader in PHP ← alas, have another project for this year
<kazinsal> I was going to do Fourth Edition Unix for the IBM PC 5150 but work got in the way :(
<nortti> oh, as in, taking the sources and getting it to run on a pc?
<kazinsal> nah, was gonna do a complete clean room reimplementation
<kazinsal> recreate v4 from the manual
<nortti> ah, probably better idea yeah. from what I understand unices before v7 were not really portable
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<gog> how are you going to write unix for a 5150
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<zid> I've never had that nokia
<zid> how does it compare to a 3210
<gog> well, it's built like a brick shithouse so you know it's a nokia
<nortti> looks like there's no nokia 5150. there's a 5160 tho, which is the north american specific version of 5110
<zid> seems 5150 is about the only model number they didn't use
<nortti> so a bit more primitive than 3210
<zid> 5150, 5110i, 5130, 5160, 5165, 5180i, 5185i, 5146
<zid> (then 3110, then 3210)
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<ddevault> what's wrong with me
<ddevault> why am I writing another EFI bootloader
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<ddevault> why am I firing up hexdump to pick through a PE32+ header again
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<zid> Because you love uefi
<zid> It's your most favouritest thing ever
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<ddevault> fucking EFI stubs
<ddevault> I wish the loader would give any feedback at all
<zid> Maybe I should make an EFI TOOL
<zid> That prints a bunch of diagnostic about an efi image
<zid> Zefi.0.log
<ddevault> I guess I need to set up an edk2 build environment
<ddevault> I am not happy about this
<zid> I'd help but I am currently too blind
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<Ermine> ddevault: why are you writing another EFI bootloader?
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<ddevault> for x86_64
<ddevault> as opposed to aarch64
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<geist> should be able to use more or less the same codebase
<geist> with just a few ifdefs here or there
<zid> #ifdef ARM entire codebase #else entire different codebase #endif
<zid> :D
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<geist> wel l my point is almost all of the UEFI stuff is the same between them
<geist> except the final handoff, and maybe some oft he logic, so you should be able to have a single code base that you just compile for different architectures for UEFI
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<ddevault> the EFI stub is, per usual, the hardest part
<ddevault> and lack of PIC for Hare on x86_64
<zid> Hare?
<geist> que esta hare?
<Ermine> Bnuy
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<gog> hare hare
<gog> hare rama
<lav> kanin kanin
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<FireFly> bnuuy bnuuy
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<Halofreak1990> I'm having a weird issue with my recursive mapping
<Halofreak1990> So, I've mapped the page directory to itself, and I have a higher half kernel mapped in. My math says the kernel page table should be accessible in the last 4MB of virtual memory (0xFFC00000), at address 0xFFCC0000, however, Qemu tells me it's located at 0xFFF00000. Anyone have an idea what I'm doing wrong?
<gog> what's the index of the recursive map?
<Halofreak1990> it's the last entry in the page directory, which itself is accessible at 0xFFFFF000
<gog> ok
<gog> where are you mapping the kernel, 2GB or 3GB?
<Halofreak1990> 3GB
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<gog> cool, so the page table for the kernel should be at 0xfffff000 + 768 then right?
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<gog> sorry, the PDE for it
<Halofreak1990> yes
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<gog> ok, then think of it like this
<gog> the page directoy is its own page table'
<gog> each page table manages 4MiB of space
<Halofreak1990> hmhmm
<gog> so the page tables are going to be in sequence in the upper 4MiB of virtual memory
<gog> FFC00000 is the start
<gog> that's where the page table for 0-0x400000 would be
<Halofreak1990> yeah
<gog> so FFF00000 is 3/4 of the way down that area
<gog> 3GIB
<gog> so that's the right place
<Halofreak1990> Oh, wow. You're right
<Halofreak1990> been staring at this for hours
<gog> yeh
<gog> wait til you try to do it in long mode
<gog> :D
<gog> it's actually the same tho, you don't have to map the PML4 to itself
<Halofreak1990> thx for the help
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<gog> np
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<heat> recursive mapping is cringe and bad
<zid> recursive cringing is heat
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<heat> but srsly when will we stop recommending recursive mappings
<heat> i'm fairly sure no real design out there does this
<heat> and it has really non-obvious footguns like having to invalidate a bunch of TLB on page table changes
<clever> what makes recursive mappings special? dont you just map the area of ram the tables are held in?
<heat> well they're recursive because they use this hacky fact that you can map the top level page table on itself and have it work out
<heat> like top_pt->entries[last_entry] = top_pt;
<heat> versus doing direct mapping of page tables such that page N is mapped to one page, page N + 1 is mapped to another, etc
<clever> so you have a chunk of physical memory, equal to whatever the top-level chunk size is, mapped at the last chunk?
<heat> no
<clever> the next level of paging tables, is stored starting at top_pt->entries[0] ?
<heat> what ends up happening is that page table walking on that last entry will end up interpreting the top page table as the next paging level
<clever> ah, yeah
<clever> but that only works if you dont map page 0
<heat> and this has the weird property of implicitly mapping page tables with $formula
<heat> and, ya know, it's a cute idea but severely limited
<clever> i might only use that as a bootstrap, so i dont have to recursively allocate each level before the mmu is online
<clever> and so the top_pt is mapped, and the kernel can change the mappings once its in virtual space and has a proper memory management
<clever> but in my last trip thru MMU code, the hugepages at the top level, where not too huge, so i was able to get away with only 1 layer permanently
<heat> ok so doing the bootstrapping early on is super annoying
<heat> i generally do this by making architecture code map $amount of physical space directly at boot time
<bslsk05> ​github.com: rpi-open-firmware/mmu.c at master · librerpi/rpi-open-firmware · GitHub
<clever> this just allocates the entire top_pt->entries in .bss, and then fills it with a simple incrementing pattern
<heat> like, on x86 my first assembly stub maps the lower 4GB of memory, then I take those lower 4GB of memory and use a bit of those for auxiliary page tables that I may need to create the large direct mapping
<clever> but this is also identity mapped
<clever> but, i can picture how i might do basic init like this, in pure asm
<heat> but once the large direct mapping is fully up, it's up, no need to bother with it again
<heat> but ofc all of this bootstrapping is very fucky, in any case
<clever> so i could implement what i linked in asm, and link the kernel to run at 0x800_0000
<clever> oops, one more 0
<clever> and once the kernel is running on that bootstrap table, malloc works normally, and the heap will stick around for the life of the kernel
<heat> in theory, yes, could work
<heat> in practice big kernels have a few more layers of indirection between "have MMU up" and "have malloc()"
<clever> and the physical page manager is part of that
<clever> but as long as you can survive on the bootstrap table, until then, it should be fine
<heat> I recreate the MMU tables again, initialize the page allocator, then initialize vm allocation and slabs
<heat> the first two steps still under a special bootmem allocator because early boot memory allocation is hard
<clever> i think the main thing there, is that you need to know the physical->virtual translations, so you can pick a physically contiguous range, and then write to it in the virtual space?
<clever> to re-create the tables
<heat> well I recreate them early enough that the architecture code still knows more or less what needs to be mapped, without even looking it up again
<clever> yeah, if everything is hard-coded with #defines or whatever, they will agree on things
<heat> kernel text, kernel rodata, kernel data, kernel percpu, direct physical mapping
<heat> that more or less covers it
<clever> related to being unable to map page 0, ive heard that apple just bans mapping the entire lower 4gig in a 64bit virtual space
<clever> so if you ever truncate a pointer to 32bits, its garanteed to fault
<heat> that's odd but I don't kinkshame
<clever> i think its mainly a safety, so people porting 32bit code to 64bit, cant introduce exploits
<zid> that's cool
<heat> also reminds me of those nasty performance errata on the new intel uarch
<zid> I bet a LOT of bugs from switching 32 to 64bit were discovered immediately by that
<clever> yep, it turns a "maybe it will crash", into a "always crashes"
<heat> where jumping over 2GB screws your branch predictor over
<zid> oh no!
<zid> not more than 2GB!
<heat> do you realize how often jumps are over 2GB?
<clever> i think the mcmodel in gcc, controls how big of an offset it reserves?
<zid> with kaslr? sometimes.
<clever> via what opcodes it decides on
<heat> no, not kaslr
<zid> I expect .so calls to be slow already
<clever> zid: but i would also expect .so calls to be less conditional
<clever> so there isnt much to predict?
<heat> on the linux memory map layout, jumps from "the main binary" to an .so will jump over several TiB
<heat> jumps from anywhere to the interpreter will jump to more or less the end of the address space
<heat> in musl's case, the interpreter IS libc.so, so there's even no way to ignore that problem
<heat> I think glibc has a new hack to map every .so under 4GB
<clever> mmap has a MAP_32BIT flag
<clever> which says to map to the lower 4gig
<zid> and what's the bench result heat
<heat> it's in the intel performance manual
<heat> the new ones, under sapphire rapids stuff IIRC
<heat> there's a measurable win
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