_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<tpw_rules> in litex is there a place to put Migen logic between the IO objects in a platform and those platform requests?
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<shenchen> in isa.c (libbase), i wonder if it'd be better to declare isr() as __attribute__((weak))?
<shenchen> so user program linking to iibbase can override the default isr()?
<tnt> tpw_rules: Don't think so. I looked at that some time ago (back before amaranth) and whitequark told me there wasn't anything like that in migen at least.
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<cr1901> _florent_: This might be a silly q, but does litedram do refresh automatically even when under software control?
<cr1901> Or are you expected to issue commands fast enough that the dram contents won't decay for the open row?
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<nickoe> Hmm. How do I request some IOs that have been added with add_extension() ? I am  not sure platform.request works.
<nickoe> or maybe I am doing the request before the add_extension?
<nickoe> I mean I get constraint error, resource not found.
<nickoe> Is it possible to have multiple uarts enabled at the same time, Say normal serial and usb_acm?
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