ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<milkylainen> Generic embedded question. How does one identify the mtd master device from userspace? iiuc, index and name can be anything? typically it would be mtd0, but I can't see any mtd flag or similar in the uapi telling me this is a master device? Or am I missing something?
<milkylainen> using addpart or delpart ioctl on all the devices to check if one of them allows the call seems like a bad idea. :)
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<prabhakarlad> robmur01: I have DMA_GLOBAL_POOL selected for specific SoC (risc-v rz/five) and carve out of memory with shared-dma-pool node in the DT for non-coherenet platform. Enabling DMA_GLOBAL_POOL config is causing an regression on other platforms when using defconfig. I was under impression having DMA_GLOBAL_POOL  enabled would only take into effect if
<prabhakarlad> we had shared-dma-pool node in DT, but it doesn't look like it.
<prabhakarlad> what should be the correct approach on using DMA_GLOBAL_POOL  without causing regressions to other platforms?
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<robmur01> prabhakarlad: oof, IIRC the global pool stuff was only really for nommu - not sure it's ever been expected to work that way
<robmur01> yeah, basically it works for platforms where either every device is coherent (i.e. nommu without caches), or every device isn't (nommu with caches), where in the absence of a global pool there's no workable alternative anyway
<robmur01> you'd need to change the fundamental dma_direct_alloc() behaviour
<prabhakarlad> In my case the SoC is non-coherent as a result a memory is carved out for DMA using this pool.
<robmur01> is there some reason the regular per-device coherency paths aren't enough?
<prabhakarlad> tbh I haven't explored that path.
<robmur01> if you have an MMU I'd expect you can just remap any old kernel memory non-cacheable, no?
<prabhakarlad> SoC does have a MMU, can you please elaborate on it.
<prabhakarlad> due to non coherence support the cache handling for L1/L2 is manually handled for DMA buffers for this SoC.
<robmur01> right, DMA_DIRECT_REMAP should already take care of everything you need
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<prabhakarlad> robmur01: thanks let me do some reading and ill respond the thread on ML.
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<biju> I ma seeing below message in next. Any one have seen this?
<biju> EEVDF scheduling fail, picking leftmost
<biju> [ 27.851967] EEVDF scheduling fail, picking leftmost
<biju> [ 27.852001]
<biju> [ 27.852006] ======================================================
<biju> [ 27.852008] WARNING: possible circular locking dependency detected
<biju> [ 27.852012] 6.6.0-rc4-next-20231004-arm64-renesas-gbf7b318a245e #1162 Not tainted
<biju> [ 27.852019] ------------------------------------------------------
<biju> [ 27.852021] kworker/u4:2/35 is trying to acquire lock:
<biju> [ 27.852029] ffff800081713210 ((console_sem).lock){..-.}-{2:2}, at: down_trylock+0x14/0x40
<biju> [ 27.852061]
<biju> [ 27.852061] but task is already holding lock:
<biju> [ 27.852063] ffff00007fbee298 (&rq->__lock){-.-.}-{2:2}, at: raw_spin_rq_lock_nested+0x20/0x38
<biju> [ 27.852085]
<biju> [ 27.852085] which lock already depends on the new lock.
<biju> [ 27.852085]
<biju> [ 27.852087]
<biju> [ 27.852087] the existing dependency chain (in reverse order) is:
<biju> [ 27.852089]
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<biju> [ 27.852089] -> #2 (&rq->__lock){-.-.}-{2:2}:
<biju> [ 27.852099] _raw_spin_lock_nested+0x40/0x54
<biju> [ 27.852107] raw_spin_rq_lock_nested+0x20/0x38
<biju> [ 27.852114] task_fork_fair+0x38/0xa4
<biju> [ 27.852122] sched_cgroup_fork+0xe4/0x144
<biju> [ 27.852131] copy_process+0x1224/0x1938
<biju> [ 27.852144] kernel_clone+0x88/0x3fc
<biju> [ 27.852152] user_mode_thread+0x6c/0x90
<biju> [ 27.852160] rest_init+0x24/0x188
<biju> [ 27.852169] arch_post_acpi_subsys_init+0x0/0x8
<biju> [ 27.852179] start_kernel+0x504/0x5f4
<biju> [ 27.852185] __primary_switched+0xb4/0xbc
<biju> [ 27.852194]
<biju> [ 27.852194] -> #1 (&p->pi_lock){-.-.}-{2:2}:
<biju> [ 27.852204] _raw_spin_lock_irqsave+0x5c/0x80
<biju> [ 27.852211] try_to_wake_up+0x54/0x4e0
<biju> [ 27.852218] wake_up_process+0x14/0x1c
<biju> [ 27.852223] __up.isra.0+0x3c/0x44
<biju> [ 27.852229] up+0x54/0x6c
<biju> [ 27.852234] console_unlock+0xe8/0x118
<biju> [ 27.852243] vprintk_emit+0x21c/0x388
<biju> [ 27.852250] vprintk_default+0x34/0x3c
<biju> [ 27.852256] vprintk+0x9c/0xb4
<biju> [ 27.852263] _printk+0x58/0x7c
<biju> [ 27.852269] rzg2l_gpio_irq_enable+0x148/0x1c8
<biju> [ 27.852279] irq_enable+0x3c/0x84
<biju> [ 27.852286] irq_startup+0x34/0x154
<biju> [ 27.852293] __enable_irq+0x64/0x6c
<biju> [ 27.852298] enable_irq+0x44/0x94
<biju> [ 27.852303] isl1208_work+0x1a0/0x1f4
<biju> [ 27.852314] process_one_work+0x1ec/0x524
<biju> [ 27.852323] worker_thread+0x288/0x3f8
<biju> [ 27.852329] kthread+0x114/0x118
<biju> [ 27.852336] ret_from_fork+0x10/0x20
<biju> [ 27.852345]
<biju> [ 27.852345] -> #0 ((console_sem).lock){..-.}-{2:2}:
<biju> [ 27.852354] __lock_acquire+0x1304/0x20b0
<biju> [ 27.852363] lock_acquire+0x1e0/0x310
<biju> [ 27.852370] _raw_spin_lock_irqsave+0x5c/0x80
<biju> [ 27.852377] down_trylock+0x14/0x40
<biju> [ 27.852382] __down_trylock_console_sem+0x34/0xb8
<biju> [ 27.852390] console_trylock+0x24/0x74
<biju> [ 27.852397] vprintk_emit+0x114/0x388
<biju> [ 27.852404] vprintk_default+0x34/0x3c
<biju> [ 27.852411] vprintk+0x9c/0xb4
<biju> [ 27.852417] _printk+0x58/0x7c
<biju> [ 27.852424] check_preempt_wakeup_fair+0x1a4/0x1a8
<biju> [ 27.852431] wakeup_preempt+0x80/0x88
<biju> [ 27.852440] ttwu_do_activate+0x74/0x1dc
<maz> biju: please use a pastebin or some other external service rather than dumping traces on IRC.
<biju> maz: sorry for the noise ok will do,
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<biju> here is the log complaing about EEVDF scheduling fail, picking leftmost
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