<azonenberg>
The Leica IC90 camera i bought for my soldering microscope is actually a standard usb video class device that i can stream from with VLC etc
<azonenberg>
I might still use their windows software in a VM at least starting out because it has various calibrations and useful tools for scale bars etc
<azonenberg>
but good to know i can write my own code to interface with it easily
<azonenberg>
i'm so used to microscope cameras being nonstandard junk this is a nice change
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<azonenberg>
Mouser shipment arrived earlier today, I forget if I mentioned
<azonenberg>
but someone interested in supporting the project donated an AD9213 to me
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<azonenberg>
(6G speed grade)
<azonenberg>
One step closer to a ZENNECK prototype
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<d1b2>
<dannas> If one single ADC meant for a 500MHz scope costs $1600, then there flies my dream out the window about a 1GHz scope for $5000 🙂
<azonenberg>
dannas: the 10G speed grade is about $2.5K iirc
<azonenberg>
then you're going to need a beefy FPGA (think ultrascale) and 1-2 channels of DDR4 to buffer that much data (120 Gbps). per channel
<azonenberg>
then probably an 8 layer PCB
<azonenberg>
then another root FPGA to aggregate the data from each channel, coordinate triggering, etc
<azonenberg>
These are not cheap projects
<d1b2>
<dannas> Oh my. So the cost savings in application processor and display is eaten up by the extra compute needed for transmitting at such high sample rates...
<d1b2>
<dannas> It's easy to see why not more people try to build their high-end scopes 🙂
<d1b2>
<dannas> But I'm very excited to watch your progress!
<azonenberg>
no this is just to buffer the data
<azonenberg>
you'd need this for an apps processor+display based system too
<d1b2>
<dannas> ok
<azonenberg>
there's a reason high end scopes are $$$
<azonenberg>
and why a lot of scope vendors make ASICs to combine some of this functionality
<azonenberg>
Being forced to use off the shelf silicon limits me
<azonenberg>
this only recently became *possible* in terms of off the shelf ADCs with this level of performance being on distributor shelves
<GyrosGeier>
there is enough time to switch channels?
<GyrosGeier>
well, presumably if it's rank-row-bank-column, then the switch will be a single hiccup in the stream
<Degi>
dannas: There once was a cheap 5 GS/s ADC which IIRC had about 2 GHz of bandwidth for 200 $ but it went EOL
<GyrosGeier>
can't we just combine ten 500 MS/s ADCs and postprocess? :>
<d1b2>
<dannas> @Degi Aha! So I can understand why the oscilloscope are so expensive, but if an ADC can be that cheap then why do the chip manufacturers have such high prices? Maybe they have large margins...
<d1b2>
<dannas> If so many ICs costs that much then I guess there are reasons for it (even taking the current chip shortage into account).
<Degi>
It was the EV8AQ160CTPY
<d1b2>
<dannas> I wonder if it's possible to salvage ADCs from old boards. Buy something from eaby and reuse the ADCs
<Degi>
But it has a parallel interface, more modern ones have JESD204B, which is easier to use but also more expensive since both sides need transceivers
<Degi>
Apparently JESD204C has a different filename
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<d1b2>
<mubes> @tnt Nice trick
<d1b2>
<mubes> BBen&&ZZoe_99
<d1b2>
<mubes> That was dumb 🙂 Ah well, it was time for a new password on that box.
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<d1b2>
<mubes> @mandl #537 doesn't seem to build against current HEAD...could you please check? Be careful to update submodules too. It's possible it's something wrong at this end but I can't look until this evening
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<d1b2>
<mubes> Ignore me, it builds fine
<d1b2>
<mubes> I really think I should stop this afternoon. Probably best not to drive anywhere either 😕