<Stat_headcrabed>
Not t-head but SOPHON sponsored it
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<YangyuChen[m]>
<drewfustini> "I ordered one today as I found..." <- I ordered that last week, and it arrived yesterday. Surprisingly, it has Zicond supported which was ratified in late 2023.
<bjdooks>
one what?
<YangyuChen[m]>
BPI F3
<YangyuChen[m]>
which has spacemit K1 SoC on the board
<YangyuChen[m]>
I think it would be great for RISC-V software development now. But I don't know if the vendor will submit patches for its driver to the mainline. They only offer Kernel v6.1 and OpenSBI 1.3 now, with a massive diff from the mainline tree. Including backporting rvv support to kernel v6.1.
<conchuod>
YangyuChen[m]: what worries me from the bsp kernel I saw is the addition ecall fid they added to the base "extension" and what they use it for
<conchuod>
Don't have a link handy, but it was doing flushes in some arch code, guarded by ifdefs
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<courmisch>
6.1 means no hwprobe means bad for software development
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<YangyuChen[m]>
<courmisch> "6.1 means no hwprobe means bad..." <- Yes. I write this comment to someone who worked at spacemit. I think it should be at least 6.6 or submit patches to mainline.
<YangyuChen[m]>
On the other hand, the spacemit K1 chip has H ext. But there is no KVM support in current kernel.
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<courmisch>
I ordered one yesterday and it shipped today
<courmisch>
now lets see how long it takes to cross from China over Mordor to here
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<courmisch>
YangyuChen[m]: did you test Zfh and Zvfh? I don't see them in your DT fix
<courmisch>
K230 has Zvfh and it seems odd for an "AI" chip not to have it
<YangyuChen[m]>
<courmisch> "Yangyu Chen: did you test Zfh..." <- I don't tested yet. My BPI F3 is running speccpu 2006 now. Maybe I can have a test tomorrow.
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<drewfustini>
YangyuChen[m]: good to hear you already received the board!
<Esmil>
drewfustini: im confused. i thought you wanted to build on the vendor clock driver rather than Yangtao's, but now you're sending another version of that?
<drewfustini>
Well, Thomas Bonnefille had mentioned it would be good to remove all the fixed clocks and use real clocks for everything currently in th1520.dtsi. I made those changes and I wanted to send it out. Then I noticed Stephen's common advice about avoiding parent strings so I tried to change that as well.
<drewfustini>
But no I want to do an overhaul because there are a lot of things I don't like about the clk driver I sent
<drewfustini>
I want to make it more like the SG2042 driver
<drewfustini>
I like how it has seperate registration for the different types of clocks
<drewfustini>
I wanted to send the rfc v3 in case it is useful to Thomas before I started making major changes
<Esmil>
i see
<drewfustini>
Also, as you originally noted, the math in the recalc rate function is wrong. Interestingly in my debugging, I realized it does get the frequency right by accident in some cases like the video pll.
<drewfustini>
Right now I'm trying to graft some of sg2042 concepts and some of the thead vendor driver code into clk-th1520-ap.c.
<drewfustini>
If it doesn't go well, then I will just forget about clk-th1520-ap.c and start over by porting the thead clk vendor code to mainline
<drewfustini>
Sorry for being indecisive
<Esmil>
no worries. i was just wondering if i had misunderstood you
<Esmil>
btw. i found that the manual has some errors in the pinmux overview table. the actual register descriptions seem to be correct though, so now my pinctrl driver is fixed so usb works on the lichee pi 4a again
<Esmil>
wifi and bluetooth is also working now in my th1520 branch
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<courmisch>
anybody knows how to enable Zvbb in user-mode QEMU?
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<sorear>
-cpu rv64,zvbb=true?
<courmisch>
dude! you need to make it look more complicated so I don't look like an idiot
<courmisch>
:o
<another|>
beat me to it
<unlord>
huh, I need to update my qemu-riscv64 binary wrapper
<sorear>
I'm more surprised it doesn't default to "all ratified extensions"
<courmisch>
ARM QEMU has a "max" CPU
<courmisch>
but I guess it's not really possible for RISC-V because some extensions are mutually exclusive
<courmisch>
(?)
<jrtc27>
doesn't emulating V slow things down if you actually use it?
<courmisch>
oh yes, very much so
<courmisch>
this is only for functional testing
<sorear>
most programs don't install a handler and will exit much quicker if they receive a SIGILL, this is correct
<jrtc27>
I mean that ifuncs will start to use it thinking it'll be faster
<jrtc27>
obviously if you require it then you need it to be present
<courmisch>
this is for functional testing on my desktop, which is based on AMorDor x86
<unlord>
jrtc27: there is work ongoing to improve V emulation in QEMU
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<conchuod>
courmisch: Theyve added a max CPU on riscv too.
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