sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<Guest36> i have booted a debian qemu on my ubuntu linux terminal and have found the machine ISA and and machine hardware name and lscpu info to be RISC-V what to do now to go further with building a RISC-V on FGPA
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<Guest36> i have booted a debian qemu on my ubuntu linux terminal and have found the machine ISA and and machine hardware name and lscpu info to be RISC-V what to do now to go further with building a RISC-V on FGPA
<drmpeg> It's too big of a question.
<Guest36> well atleast any idea on where to start since i am very new to this
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<conchuod> Find someone that has already done it and "take inspiration" I guess.
<conchuod> If you're very new to it, seeing what others have done can only be beneficial, right?
<conchuod> palmer: Do you ever test XIP?
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<somlo> Guest36: for an existing (and working rather well, IMO) risc-v on fpga project, check out https://github.com/enjoy-digital/litex
<somlo> there's also a #litex IRC channel
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<palmer> conchuod: IIRC I just build XIP, I never found a QEMU config that could boot it
<conchuod> palmer: Right.. I think I can do XIP on g5soc, but I don't want to invest the time in implementing that just to test some patches. I suppose if it breaks, we will hear eventually!
<palmer> that's the theory
<palmer> I think it's vaguely useful, but if it turns out nobody's using it and it's broken then maybe it's not worth the pain -- it does touch a lot of stuff
<conchuod> "VexRiscv" seems to use it
<conchuod> That's Myrtle's stuff I think
<conchuod> I suppose that means there is someone who probably cares enough to test it, if asked.
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<palmer> you mean XIP? ya, I've seen some people file bugs before when it's broken. Just not in about a year, which might mean they stopped caring...
<palmer> (or it's broken and they don't update their kernel, which is probably the likely one)
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<conchuod> I'm not really sure that anything did change, but Alex is changing some bits that affect them and I'd like to make sure nothing is gonna break.
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<palmer> that seems reasonable
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