klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<gog> my wife upgraded to windows 11 on her new computer and i gotta say: it feels unfinished, it has weird quirks that i can't quite understand
<gog> also i hate it
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<eryjus> sometimes things just don't make sense until you figure them out
<rustyy> or they are simply poorly designed and make no sense =)
<eryjus> that too
<eryjus> I blame the author completely
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<geist> I upgraded one of my lesser used machines to windows 11, actually type only one that out of the box can be upgraded, because i had never turned off secure boot on it
<geist> FWIW it’s not *terrible* and surprisingly seems to run better on it, since it’s an underpowered machine
<geist> But… yeah
<Mutabah> MS maintaining the tick-tock release pattern
<vdamewood> gog: Sounds like every release of Windows.
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<vdamewood> XP was crap, but XP SP2 was one of the best OS's ever.
<geist> Also imo win2k was a solid release
<Mutabah> Which was first, 2K or ME?
<vdamewood> 2k
<Mutabah> Still holds then :)
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<vdamewood> geist: I'm having a hard time finding something to complain about Windows 2000's initial release.
<vdamewood> So, I'll give you that one.
<geist> Sure but i thought it held up: win2k (good) -> XP (bad) -> XP SP2 (good)
<geist> I always consider the win9x range to just be a different OS
<vdamewood> Well, it is.
<vdamewood> geist: And yeah, I misinterpreted what you meant. I thought you were commenting on my 'the initial release has problems' and not Mutabah's tick-tock comment.
<vdamewood> Well, I didn't exactly say it that way, but yeah.
<vdamewood> Though NT 4 wasn't really all that bad, though my copy of NT4 SP1 is unusable for me, but once it's upgraded to SP6 it's fine.
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<radens> What is the IRQ number for the SD card interrupt for the raspberry pi (versions < 4)?
<klange> I should write a new malloc...
<vdamewood> klange: Have you seen mine?
<klange> Can't say I have, just know mine is feeling crusty and old.
<vdamewood> void *malloc(size_t sz) { return (void*)rand(); }
<klange> Mine's a bit better than that ;)
<vdamewood> I would hope so.
<klange> But it was written under certain restrictions that were acceptable when I opted to use it in my OS and which are starting to be problematic.
<vdamewood> klange: You just described every feature of Windows.
<klange> It was written as a uni course assignment, and it was required to only use sbrk, which, great, when I wrote an OS a year later that made it easy to port over.
<klange> Except now I really would like to do some proper anonymous mmapping... and have processes actually release some of this memory they've allocated...
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<klange> now that is a nicely aligned tail... https://klange.dev/s/Screenshot%20from%202021-11-29%2015-59-35.png
<klange> Going to make the panel widgets all configurable, so who knows where one will end up, need to make sure the popups look nice wherever they are
<pounce> > it was required to only use sbrk
<pounce> ugh my uni made me write malloc only using their mmmap
<pounce> would prefer to use both
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<clever> radens: the vc4 line (pi0-pi3) has 2 SD controllers you can use
<clever> radens: are you using the sdhci controller or the sdhost controller?
<radens> ah what's the difference?
<clever> the sdhci controller is following the official sdhci specs, and is SDIO capable
<radens> I think sdhci. Whatever is referred to as mmc on the 2836 peripherals pdf
<clever> the sdhost controller cant do sdio, and uses a non-standard interface, but the comments in the linux source says it has higher thruput
<radens> sdio?
<clever> SDIO is required to drive the wifi chip
<clever> SDIO is back from the days when people shoved a webcam or a wifi expansion card into the SD slot of a PDA
<radens> yikes
<clever> and they still make SDIO wifi chipsets to this day
<clever> radens: just look at this little webcam! https://en.wikipedia.org/wiki/SD_card#/media/File:HP_PhotoSmart_SDIO_Kamera.jpg
<bslsk05> ​en.wikipedia.org: SD card - Wikipedia
<radens> both cute and horrifying
<clever> :D
* clever digs up irq table
<bslsk05> ​github.com: VideoCore IV Programmers Manual · hermanhermitage/videocoreiv Wiki · GitHub
<clever> radens: this is the table i usually reference, but youll need to subtract 64 off any irq# you see in it
<clever> 56 is labeled as INTERRUPT_SDIO (INTERRUPT_SDCARDHOST)
<clever> which is confusing as heck, lol
<clever> 35 is INTERRUPT_SDC
<clever> the dts is probably a better reference, *digs*
<radens> so I decompiled a device tree blob to device tree source which ships with alpine linux for the pi. Each interrupts section has an array of integers
<radens> the first integer is probably the bank where bank 0 is the basic bank
<bslsk05> ​github.com: linux/bcm2835.dtsi at rpi-5.10.y · raspberrypi/linux · GitHub
<radens> the second is the offset into the bank
<clever> the original source for the dts is in here
<radens> But that's just a guess
<clever> digging thru those now
<bslsk05> ​github.com: linux/bcm283x.dtsi at rpi-5.10.y · raspberrypi/linux · GitHub
<clever> this says sdhost is on bank 2 irq 24, which i think is 56, which fits with the table i gave earlier
<bslsk05> ​github.com: linux/bcm283x.dtsi at rpi-5.10.y · raspberrypi/linux · GitHub
<clever> and sdhci is bank 2 irq 30, which comes out to 62?
<radens> thanks, that matches up with what I was looking at
<clever> which the other table claims is INTERRUPT_ASDIO
<clever> let me check a 3rd table...
<radens> so if I'm banging bits into the EMMC controller which sd card thing am I using?
<clever> compare your MMIO addr to the reg= of the 2 entries in the above dtsi
<clever> radens: also, in an ideal world, you would be parsing the DTB at bootup, and doing what it says, but that does raise the complexity a good deal
<radens> I have played around with that sort of thing before, and it's very nice and flexible, but I think I messed up my API for the device tree parser.
<clever> ive mostly been on the other end of dtb, writing the dts files, and patching it on bootup with a custom bootloader
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<radens> Thanks clever
<clever> radens: what is your main interest with the rpi?
<geist> clever is judging you, to determine if you are worthy
<clever> lol
<radens> clever: I have several interests. One is learning more about aarch64. Another is learning about what the hell is going on on that gpu
<clever> radens: i have several gpu examples, that work without even turning on the arm core
<geist> (annoyingly irccloud has arbitrarily assigned both of you the same color, and you have same length names)
<radens> btw I have a ghidra plug in I'm working on which decompiles part of the videocore iv ISA
<radens> clever: I'd love to see those
<clever> radens: there is already a ghidra PR that can do that
<radens> clever: oh slick, do you have a link?
<bslsk05> ​github.com: Initial support of Broadcom VideoCore IV by paolovagnero · Pull Request #1147 · NationalSecurityAgency/ghidra · GitHub
<clever> i just built the whole ghidra from that branch, and its been working amazingly
<clever> the only thing it doesnt understand is the vector opcodes
<clever> radens: there are ~3 main parts of the "gpu" on the rpi, the VPU (its basically just a cpu core), the 2d subsystem, and the 3d subsystem
<clever> radens: https://www.youtube.com/watch?v=JFmCin3EJIs the 2d subsystem is basically a sprite only gpu, you define the dest xy, and the source image params, and it renders each sprite in the list
<bslsk05> ​'Chaos, 13 sprites randomly bouncing around' by michael bishop (00:00:12)
<radens> clever: which subsystem are the QPUs part of? 3d?
<clever> yeah, the QPU's are part of the 3d subsystem
<clever> the v3d core takes shaders+polygons+textures and turns it into a bitmap image in ram
<clever> the 2d subsystem turns images in ram (bitmap and planar) into a stream of pixels with hsync+vsync data
<clever> and the various output PHY's turn that pixel stream into various video signals
<bslsk05> ​'rpi open firmware boot' by michael bishop (00:02:23)
<clever> this is one of my most complex demo videos
<clever> radens: the top block of text is the VPU debug logs, the bottom text block is just `/dev/fb0` from linux on the arm core, the spinning triangle is a shader on the QPU, and the bouncing raspberry is just a simple 2d animation (changing the xy coord)
<clever> the 2 animations are tied to vsync and doing proper pageflips, the text consoles arent doing pageflips and can tear
<radens> clever: do you know if anyone has looked into exploiting the vpu core? I hear it's running threadx?
<clever> radens: ive mostly been working on running little-kernel on the VPU instead
<radens> what's a pageflip?
<clever> its far easier to get the firmware to co-operate when you control the source of the firmware
<clever> a pageflip is when you change which image is being rendered at vsync, so you dont get tearing
<radens> What's a vsync then?
<klange> Classically, when the electron beam reached the bottom and had to be repositioned back to the top.
<clever> vsync is a pulse generated by the video circuit when the "electron beam" is between the bottom and top of the screen
<radens> Sorry I am not at all familiar with GPUs at all. I stumbled upon the docs for the QPUs by accident and started diving in bass ackwards
<clever> yeah
<clever> been there, write an opengl stack from scratch, without any clue how opengl was meant to work :P
<radens> I was like, fuck, this is just a whole extra CPU with a bunch of goofy logic
<clever> wrote*
<klange> There is a way OpenGL is _meant_ to work?
<klange> And here I thought Kronos were just throwing things at a wall...
<geist> ah klange has reached enlightenment
<clever> klange: more, that i wasnt extending mesa in a portable way, i was just implementing each missing function how i thought it was meant to work
<clever> so i couldnt reuse any existing mesa logic at all
<clever> i was also not reading any opengl docs, lol
<clever> i just looked at an existing opengl client, guessed how the function worked, then made it do that
<radens> clever: is any of your work open source, or just hanging out on the internet to be perused?
<clever> yeah, its all on my github
<bslsk05> ​github.com: lk-overlay/v3d.c at master · librerpi/lk-overlay · GitHub
<clever> radens: this is the triangle example i linked earlier
<clever> radens: and that was then based on https://github.com/cleverca22/hackdriver/
<bslsk05> ​cleverca22/hackdriver - A hacky userspace v3d driver for the raspberry pi. (is fork /2 forks/7 stargazers)
<radens> clever: Are you using the port of gcc or the port of llvm for videocore iv?
<clever> i just ported it from running on linux via /dev/mem, to running directly on the VPU without any kernel to help it
<clever> the gcc port
<geist> oh never saw that pi boot thing you pasted a whiel back. seemse to be booting linux while continuing to draw stuff on the screen from the vpu?
<clever> geist: yep
<geist> noice.
<clever> geist: in theory, i could wrap the linux /dev/fb0 onto a teapot and spin it, lol
<clever> before /init even starts
<clever> it would even keep spinning if you panic()
<geist> yah i guess you're honoring enouhg of the linux vpu mailboxes so it thinks it has a screen?
<geist> or does it just blat on the framebuffer and not care?
<clever> nope
<clever> no mailbox at all
<clever> there is a simple-framebuffer "device" in dts
<geist> got it
<bslsk05> ​github.com: rpi-open-firmware/rpi2.dts at master · librerpi/rpi-open-firmware · GitHub
<clever> so you just define the pixel format, addr, widht/height/stride, and linux barfs into it
<geist> makes sense
<clever> there is also provisions to link that simple-framebuffer to a KMS node elsewhere in the tree
<clever> so when you modprobe the right driver, linux can transition from one to the other
<clever> then you get a simple driver during boot, but can upgrade later
<radens> I hear the new raspberry pi 4 has a new gpu which runs videocore 6 or something. Is there any research into that yet? Or did I misunderstand something?
<clever> radens: from what ive heard, vc6 is unfinished
<clever> they basically grafted the vc6-v3d core onto a slightly modified vc4 core
<clever> with the 2d subsystem modified slightly to support 4k video
<radens> Ah so the VPU is the same but then the QPUs may have changed?
<clever> exactly
<clever> fewer QPU's, running at a higher clock rate, with a different ISA, and an MMU slapped over it all
<clever> on vc4, the QPU's memory view, was into that set of 4 1gig aliases, and the cache control bits in bit 30/31
<clever> on bcm2711, the QPU's go thru a dedicated mmu, that maps the 4gig addr space into the 16gig addr space
<radens> Do you mean an iommu or a separate mmu on the vpu/qpu side of the house?
<clever> a dedicated mmu just for the 3d core
<radens> gotcha. Is there an iommu on the arm at all?
<clever> all other gpu peripherals are still in the VPU addr space, and limited to the lower 1gig of ram
<radens> Or is it still playing second fiddle?
<clever> there has always been an extra MMU for the arm core as well
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<clever> ive not gotten the arm working on the 2711 yet, but i suspect that MMU is still present
<bslsk05> ​github.com: lk-overlay/arm.c at master · librerpi/lk-overlay · GitHub
<radens> I'm curious about the security boundary between the cores, and I don't think there can be one without an iommu controlled by the arm
<clever> radens: on the VC4 era systems, there are 64 pages of 16mb, in the "arm physical" space
<clever> the arm is still a second-class citizen, with the VPU having the keys to everything
<clever> the VPU can configure things so that the ARM has no access to any peripheral
* radens reads "with the VPU being juicy juicy attack surface"
<clever> the VPU does have trustzone style security features, and even secureboot style stuff
<clever> so you can lock it down heavily
<radens> oh interesting
<bslsk05> ​github.com: VideoCore IV Programmers Manual · hermanhermitage/videocoreiv Wiki · GitHub
<clever> > The processor has at least 3 states configured by bits 31 and 29 of the processor status register sr (r30):
<clever> supervisor, exception, and user mode
<radens> yeah I saw that
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<clever> there is an MPU style thing in place, that can restrict what the VPU can do
<radens> How can the vpu lock the arm out of the peripherals?
<clever> and the official firmware has a bit of a syscall like api, because it cant access sensitive peripherals when in its normal mode
<clever> ~3 ways
<clever> 1: there is the MMU between arm physical and the vpu bus, you can just not map the peripherals!
<bslsk05> ​github.com: lk-overlay/arm.c at master · librerpi/lk-overlay · GitHub
<clever> this code maps the MMIO to both the pi1 and pi3 addr, for extra compatability!
<clever> but if you comment that out, the arm core will become a prisoner, and can only access ram
<radens> where in ram does the vpu OS live?
<clever> the official firmware lives at the top of the address space
<clever> offset down by the gpu_mem= in config.txt
<bslsk05> ​github.com: rpi-open-firmware/arm_control.h at master · librerpi/rpi-open-firmware · GitHub
<clever> depending on that config, you can make it such that arm-kernel MMIO works, but arm-userland MMIO fails
<clever> that will leave people puzzled for months, because mmap on /dev/mem doesnt work :P
<clever> (been there)
<clever> 3: i suspect the ARM_C0_FULLPERI flag changes what peripherals the arm can access, but havent investigated it yet
<radens> fascinating
<radens> I need to get some rest
<radens> thanks for all of this interesting info!
<clever> radens: i'm also hanging out in #raspberrypi-internals if you want to chat later
<radens> clever: I'll be sure to swing by later! Thanks!
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<klange> I am starting to work on an instruction parser for TrueType. I've got basic instruction parsing down. Need to implement FDEF/ENDF and IF/ELSE/EIF, which are interesting. Then I need to... implement the actual math of the opcodes.
<clever> a story to maybe keep in mind, many many years ago, windows moved the font parsing/rendering into the kernel, to try and cheat at some benchmarks i think
<clever> then when truetype came along, truetype support got added directly into the kernel
<GeDaMo> I assume that ended badly :P
<clever> then remote code execution exploits sprung up, giving an attacker kernel level access :P
<klange> Yes, and they - and everyone else - screwed up because they aimed for speed over safety.
<clever> now nobody uses the kernel font routines, and everything gets done in userland
<clever> back when there was only bitmap fonts, there wasnt any safety concerns
<clever> and nobody bothered to reconsider that, when adding a bloody turing complete font :P
<zid> ergh truetype
<clever> ASLR cant help you there
<klange> When I was at Apple, we had... a similar snafu, except it was with Freetype in Safari on iOS.
<klange> TrueType maybe turing complete, but it's really quite well restricted if you actually bother checking things.
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<klange> You miss a bounds check on a vector table here... blindly trust a table header there... and oops Linux is running on your Xbox.
<clever> bounds checks is also what lead to a chiptune exploit
<clever> the chiptune files, where just 6502 asm, and the "player" just emulated the entire cpu and SID chip
<clever> and the original asm expected a cartridge with rom bank switching, so the emulator has to support that
<clever> and if you dont do bounds checking, you can index beyond the end of the rom image
<clever> also, gnome(was that it?)'s file manager would auto-play any music file you select
<klange> I just had a talk with someone about that. NES Sound Files. gstreamer plugin had a ^ bug, and then to add to that Nautilus was using file extensions as a white list of things to pass to thumbnail generation and though mp3 was a good thing to generate thumbnails for, which then led to calling gstreamer, which then oops.
<clever> so just selecting the file, with no intent to run it, would get you exploited
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<clever> yeah
<klange> So you take your crafted NSF file, rename it to whatever.mp3, and now you open the directory it's in and... Calculator.
<clever> lol
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<clever> and just for the fun of it, i'm now attempting to run 400mhz ram at 600mhz...
<clever> it initialized, then hung
<clever> 547mhz, works just fine
<klange> Anyway, I will continue my TrueType adventures tomorrow. It'll take a lot of work to get all the instructions I need to hint DejaVu Sans Mono...
<zid> my 667MHz RAM will run at 900MHz, it struggles at 1000MHz
<zid> but I think it was just an 800MHz kit sold cheaper
<clever> in my case, its a pi3 with 1gig of ram
<clever> but behind the curtains, its a pair of 512mb lpddr2 dies, in a single epoxy package
<clever> each sharing half the data bus
<clever> so every access is getting striped across both chips
<zid> 400MHz ddr2? or actually like.. 200MHz?
<zid> but doubled
<clever> thats what i'm still fuzzy on
<zid> real ddr2 is 200-266Mhz
<zid> with a bus rate of 200-533
<clever> ah
<zid> DDR2-800 -> 200MHz
<clever> (19.2 * 83) / 4 == 398.4
<zid> (PC2-6400)
<clever> (19.2 * 83) / 8 == 199.2
<clever> zid: the reference crystal is 19.2mhz, and the dram clock divisor is 83, but i dont know the exact ratio between that, and the final bus rate
<zid> Sounds like it's PC2-6400
<clever> (under/over)clocking the ram does have a measurable impact on the latency to do a single uncached 32bit read
<bslsk05> ​docs.google.com: rpi clock rates - Google Sheets
<zid> can you adjust the cas/ras/etc?
<clever> possibly
<zid> You can find the limiting factor and lower the others, usually
<zid> even after you hit your top clocks
<zid> idk if ddr2 has command rate, but I like to use the highest that can still do 1T
<bslsk05> ​github.com: lk-overlay/sdram.c at master · librerpi/lk-overlay · GitHub
<clever> zid: this is the bulk of the timing configuration parameters
<clever> ive not tried messing with them yet, but i could
<clever> the issue, is figuring out which field contains the cas....
<zid> tRTP is precharge time..
<clever> there is a ras-min field
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<zid> tCL tRP are cas and ras usually
<zid> and ddr 6400 timings are like.. 5-5-5-15
<clever> does both the dram chip and the controller need to be aware of the same timings?
<clever> i feel like they do, for the pipelining to work right
<zid> trcd = ras to cas delay
<zid> no tCPD for command rate :(
<clever> or its burried in the magic numbers in the file
<zid> or yea, just not exposed via that struct yet
<clever> check the reset_with_timing function
<clever> that encodes the struct fields into registers
<clever> and down at 591-597, it adjusts the struct slightly, for different ram sizes
<clever> zid: do you have any guess as to how the colbits/rowbits/banklow control things?
<zid> nothing springs to mind
<clever> are things like the "open row" command using a row#, and need to be aware of how many bytes are in a row?
<zid> rows are always 64 afaik
<clever> but when you gang a pair of 512mbyte chips in parallel on a single data bus, giving an "open row 42" command, will then wind up giving you a 128 byte row in the combined buffer
<clever> and the only difference in this code, between 512mb and 1gig(really just 2 512mb's) is the col/row/bank bits
<zid> sounds like you already know what they do then
<clever> kinda, but not how
<clever> the 128mb/256mb chips use the identical values
<clever> and 512mb has its own unique set, but is still a single-die
<clever> so its not really clear what the exact number means
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<bslsk05> ​www.righto.com: The Yamaha DX7 synthesizer's clever exponential circuit, reverse-engineered
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<heat> warm greetings
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<sortie> drop it like it's heat
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<heat> I had my interview today, it was fun. Maybe not the best of performances but I got good enough solutions (IMO) to the problems and I was always communicative
<sortie> :D
<heat> hopefully I get called back for a second interview but even if I don't go through, that's alright, it was my first time and I'll allow myself to fail
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<heat> it was definitely an experience I'll tell you that lol
<sortie> Yay
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<heat> plenty of years ahead of me to work on all the big $LC_CORPs out there ;)
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<Bitweasil> Interviewing is a lot more fun when you don't care about the result.
<Bitweasil> If you're stressed about getting the job, most people interview worse.
<heat> yeah
<heat> i was definitely nervous since it was my first time doing a coding interview and it's FREAKING FACEBOOK
<Bitweasil> Oh.
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<Bitweasil> Were you frothing at the mouth excited about how AMAZING!!!!!! Facebook is?
<j`ey> um
<j`ey> you mean Meta, rite
<heat> yes
<Bitweasil> I interviewed with them some years back, the feedback was that I was technically competent, but not excited enough about Facebook's mission.
<Bitweasil> Which was to say, when they asked why I was interviewing, I said that the work sounded interesting, and that I don't turn down interviews.
<heat> I still find it odd how they so quickly switched everything from saying facebook to saying meta
<Bitweasil> vs "I'm looking to CHANGE THE WORLD by Connecting People on Facebook!" or whatever they wanted.
<heat> except the recruiting page :v
<Bitweasil> Dunno, I don't use the thing anymore.
<Bitweasil> My account has been disabled for... oh, probably a year and a half?
<heat> oh no that's still facebook
<heat> in my case (although this is an internship so I'm not sure if it's different) I just had a plain coding interview with a Q&a with the engineer at the end
<Bitweasil> *nods*
<heat> if I go through there should be a second round where I'll get questioned on all things networking
<heat> dunno if there's any "hey who are you and what do you like, why do you want to join us" time
<Bitweasil> Back when I interviewed, that was part of every interview.
<Bitweasil> And they properly discovered that I wasn't terribly excited about Facebook.
<Bitweasil> Would have done it for the right offer.
<Bitweasil> My current position is less interesting than what I was doing before, but they made it worth my while.
<heat> yeah I get what you mean
<Bitweasil> Bitweasil: Tosses out large number thinking that we'll negotiate down. Them: "Ok." Bitweasil: "Aw, poop."
<heat> if I were interviewing I'd much prefer someone that's being honest than a "OMG OMG OMG I LOVE $CORP AND I ALWAYS USE ALL THEIR PRODUCTS AND I HAVE A $CORP_PHONE AND A $CORP_PC AND I SLEEP WITH A $CORP ONESIE"
<zid> "I'm interviewing here because your products are so shit even I could make them better"
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<Bitweasil> In AArch64, valid registers are X0-X30, and SP... but X31 is used to encode the zero register. Is SP effectively X31 in some instructions, vs it being used as zero in others? Or should I just keep chewing through until I find the actual opcodes? :)
<zid> I thought sp was x29
<Bitweasil> On AArch64? Hm.
<zid> oh probably not
<Bitweasil> It implied SP was a separate thing.
<zid> I just realized I remembered mips not arm
<j`ey> Bitweasil: yes it depends on the instruction
<Bitweasil> Ok, that's what I thought, just trying to make sure I've got my head wrapped around it properly with what I've read so far.
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<sortie> I should set up a secondary ircd server so I can say my OS doesn't netsplit and actually get away with such claims
<zid> My OS doesn't crash
<zid> Nobody would run it and it barely does anything
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<immibis> just redefine the word "crash"
<immibis> anything short of a triple fault is not a crash, just an exception
<heat> except a panic
<heat> or a hang
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<heat> or a deadly signal
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<kazinsal> a fucky-wucky
<gog> oopsie whoopsie
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<Bitweasil> "Oh dear, that's a really big whoopsie there!"
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<kazinsal> raise_signal(SIGBIGSTINKY)
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<zid> black friday is a scam, nobody will give me a £240 monitor for the £100 amazon credit I have
<Bitweasil> SIGOHDEAR
<Bitweasil> Of course, there's the really bad one.
<Bitweasil> SIGBLESSYOURHEART
* Bitweasil wanders out.
<kazinsal> SIGARENTYOUJUSTTOUCHEDBYANANGEL
<Bitweasil> zid, it's Monday. :p
<Bitweasil> Also tech sucks.
<Bitweasil> kazinsal, lol. Zing.
* Bitweasil wanders off.
<zid> yea but amazon doesn't know that
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<zid> You're just going to have to hire me to crash your OSs or something