_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<Hammdist> on colorlight 5a-75b is there PHY initialization required?
<Hammdist> i.e., through MDIO?
<sensille> i don't think so, not totally sure. but it just worked with litex
<sensille> you only have to be careful with the reset line as it stops the clock (or was it on 5a-75e?)
<Hammdist> I know litex works on it but maybe the firmware is doing mdio commands? if so I would like to get a code pointer to that ...
<Hammdist> litex/soc/software/libliteeth/mdio.c indeed there is code for interacting with mdio through csr
<Hammdist> still not sure what, if anything, invokes it though
<Hammdist> litex/soc/software/bios/cmds/cmd_liteeth.c the bios, for one thing
<Hammdist> but that's not an initialization sequence that's just if you want to send mdio commands manually
<Hammdist> so apparently litex bios just resets the phy without mdio, though there is option to turn this off: https://github.com/enjoy-digital/litex/blob/a4ead5cab9d341d1b642c016b5f8526b645b3b40/litex/soc/software/libliteeth/udp.c#L464
<Hammdist> I haven't actually found the code of crg_reset but I think that's how it is
<Hammdist> this would mean it's probably OK to not initialize the PHY through MDIO
<Hoernchen> there is in theory nothing you need to do unless you want to turn off autonegotiation for <1gbit or shift the interface delay
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<Hammdist> thanks for confirming
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