_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<_florent_> ozel: Hello, sorry for the delay, I was just going to have a look at this
<_florent_> ozel: I'll at least update the example designs
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<_florent_> tnt: Regarding CSR fixed mapping, I'm currently testing this on some designs: https://github.com/enjoy-digital/litex/pull/1467
<_florent_> tnt: If you want have time to do some tests or provide feedback, I'm interested :)
<tnt> _florent_: oh, interesting. One immediate feedback I'd have is to have some support for a "base" when a AutoCSR module has a submodule which is also AutoCSR.
<tnt> maybe akin to the csr_map at the top level.
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<_florent_> tnt: thanks, yes, that's only the first step :)
<somlo> _florent_: getting an error after the latest csr PR merge
<somlo> command line is
<somlo> litex-boards/litex_boards/targets/digilent_nexys_video.py --build --cpu-type rocket --cpu-variant full4d --sys-clk-freq 50e6 --with-ethernet --with-sdcard --with-sata --sata-gen 1 --with-sata-pll-refclk
<somlo> error is: LiteEthMAC.get_csrs() got an unexpected keyword argument 'sort'
<somlo> _florent_: no need to reply here, I added a comment to PR #1467 on github, we can deal with it there :)
<_florent_> somlo: this should be fixed
<_florent_> somlo: thanks for the feedback
<somlo> _florent_: thanks, it's building now
<somlo> there's another change w.r.t. liteeth: there used to be ethmac, ethphy,a nd buffer CSR register set base addresses
<somlo> now there's just ethphy and the buffer address, ethmac is missing
<somlo> and that's the one that actually matters (at least to linux)
<somlo> so I still think there's another regression that affects LiteETH
<somlo> in `csr.csv`, there used to be a `csr_base, ethmac,0x********` entry that's now missing (in addition to `csr_base,ethphy,*` that's still around
<_florent_> somlo: ah sorry, I forgot to add half of the fix, this should good now
<somlo> diff csr_nexys_video.csv csr.csv
<somlo> < # Auto-generated by LiteX (2de9bb20) on 2022-10-21 10:32:16
<somlo> ---
<somlo> > # Auto-generated by LiteX (fd285b17) on 2022-10-21 17:17:26
<somlo> 2c2
<somlo> 39,52c39,52
<somlo> < csr_register,ethmac_sram_writer_slot,0x12001000,1,ro
<somlo> < csr_register,ethmac_sram_writer_length,0x12001004,1,ro
<somlo> < csr_register,ethmac_sram_writer_errors,0x12001008,1,ro
<somlo> < csr_register,ethmac_sram_writer_ev_status,0x1200100c,1,ro
<somlo> < csr_register,ethmac_sram_writer_ev_pending,0x12001010,1,rw
<somlo> < csr_register,ethmac_sram_writer_ev_enable,0x12001014,1,rw
<somlo> < csr_register,ethmac_sram_reader_start,0x12001018,1,rw
<somlo> < csr_register,ethmac_sram_reader_ready,0x1200101c,1,ro
<somlo> < csr_register,ethmac_sram_reader_level,0x12001020,1,ro
<somlo> < csr_register,ethmac_sram_reader_slot,0x12001024,1,rw
<somlo> < csr_register,ethmac_sram_reader_length,0x12001028,1,rw
<somlo> < csr_register,ethmac_sram_reader_ev_status,0x1200102c,1,ro
<somlo> < csr_register,ethmac_sram_reader_ev_pending,0x12001030,1,rw
<somlo> < csr_register,ethmac_sram_reader_ev_enable,0x12001034,1,rw
<somlo> ---
<somlo> > csr_register,ethmac_sram_reader_length,0x12001000,1,rw
<somlo> > csr_register,ethmac_sram_reader_level,0x12001004,1,ro
<somlo> > csr_register,ethmac_sram_reader_ready,0x12001008,1,ro
<somlo> > csr_register,ethmac_sram_reader_slot,0x1200100c,1,rw
<somlo> > csr_register,ethmac_sram_reader_start,0x12001010,1,rw
<somlo> > csr_register,ethmac_sram_reader_ev_enable,0x12001014,1,rw
<somlo> > csr_register,ethmac_sram_reader_ev_pending,0x12001018,1,rw
<somlo> > csr_register,ethmac_sram_reader_ev_status,0x1200101c,1,ro
<somlo> > csr_register,ethmac_sram_writer_errors,0x12001020,1,ro
<somlo> > csr_register,ethmac_sram_writer_length,0x12001024,1,ro
<somlo> > csr_register,ethmac_sram_writer_slot,0x12001028,1,ro
<somlo> > csr_register,ethmac_sram_writer_ev_enable,0x1200102c,1,rw
<somlo> > csr_register,ethmac_sram_writer_ev_pending,0x12001030,1,rw
<somlo> > csr_register,ethmac_sram_writer_ev_status,0x12001034,1,ro
<somlo> 54,55c54,55
<somlo> < csr_register,ethmac_rx_datapath_preamble_errors,0x1200103c,1,ro
<somlo> < csr_register,ethmac_rx_datapath_crc_errors,0x12001040,1,ro
<somlo> ---
<somlo> > csr_register,ethmac_rx_datapath_crc_errors,0x1200103c,1,ro
<somlo> > csr_register,ethmac_rx_datapath_preamble_errors,0x12001040,1,ro
<somlo> does this mean that not the base addresses, but the register offsets within each region has changed?
<somlo> if so, that's bad news for the Linux drivers...
<somlo> well, the LiteETH linux driver in particular, the other devices don't seem to be affected...
<somlo> I'm building it and will test before being 100% sure this is a problem, but I'll need 30-40 minutes
<somlo> more updates to PR #1467 on github, for better asynchronous communication :)
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