_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<swetland> Figured out the Icesugar Pro HDMI issues:
<tnt> why would that be needed on that board and not ulx3s ?
<swetland> I assume different electrical situation on the hdmi wiring
<swetland> it might be good on ulx3s too, haven't tested there
<swetland> what I know is I could not get my Dell monitor to recognize output from the ISP with the same timing as on ULX3S, and when I looked at the demo colorbars project on the ISP github they drive both p and n, so I adjusted to do that and I get a working display
<swetland> I know from putting a scope on the Rs or Cs in front of the HDMI connector on the ISP that with the litex build, out of the box, the p pins have signal and the n pins do not
<tnt> Mmm ... the icesugar platform file is wrong.
<tnt> IOStandard("LVCMOS33") on the HDMI lines should be IOStandard("LVCMOS33D")
<tnt> the "D" is for pseudo differential, which enables all that stuff internally to the fpga.
<swetland> bloody hell
<swetland> I thought I checked that
<swetland> well that was a bunch of painful python plumbing for nothing ^^
<swetland> though I do think the clock changes are still good.
<tnt> yeah probably good to have defaults that meet timing.
<swetland> I'm rebuilding to verify but I'm about 100% certain adjusting the iostandard will indeed resolve the signal issue
<swetland> plus side: much cleaner fix
<swetland> ERROR: cannot place differential IO at location PIOB
<swetland> unclear which IO it dislikes
<tnt> Oh, well I guess that's why it was that way ...
<swetland> the display *works*... but I'm not sure why now
<tnt> huh ? If it said "error" it wouldn't have rebuild the bitstream right ?
<gatecat> > ERROR: cannot place differential IO at location PIOB
<gatecat> you could still perhaps use LVCMOS33D by changing the IO constraint to be on the PIOA side and then invert the data, assuming the PIOA is indeed used for the - side
<swetland> ah I guess I'm used to vendor tools having a generous idea of success
<swetland> do you know where I can find the map of the corresponding pins for PIOA/B/etc? some lattice doc presumably?
<gatecat> yeah there should be a spreadsheet
<swetland> there we go. found it
<swetland> ye gods. they are all over the bloody place
<swetland> only data2p/data2n are actually situated on a differential pair
<swetland> only data2p/data2n are actually situated on the same differential pair
<tnt> :/ I guess the icesugar-* designer didn't improve. the ice40 one already had some very questionable choices.
<swetland> the board otherwise seems functional enough. I wish more ULX3Ses were more rapidly available, but this was better than nothing.
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