ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<krzk> arnd: abelloni: I took this S3C RTC patch as it has ack and touches arm options.
<arnd> Ok, thanks krzk
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<ajb-linaro> arnd: well I have my fancy new case but I'm having issues with getting the SSD to work due to a missing/non-functioning USB host controller
<ajb-linaro> arnd: I'm going to guess it's another DT related issue
<ajb-linaro> [ 4.848726] xhci_hcd 0000:01:00.0: xHCI Host Controller
<ajb-linaro> [ 4.853981] xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 2
<ajb-linaro> [ 14.861370] xhci_hcd 0000:01:00.0: can't setup: -110
<arnd> ajb-linaro: do you have a semi-recent firmware build? Older versions of the firmware could not boot from usb, but it was usable in the kernel
<ajb-linaro> that 10 seconds looks very much like a timeout due to probing the wrong place?
<arnd> yes, also #define ETIMEDOUT 110
<ajb-linaro> arnd: the firmware is recent - I'm still booting via uboot/TFTP so I just need to see the USB host on startup to mount the rootfs
<ajb-linaro> arnd: first things first - should it be a xhci_hcd host controller?
<arnd> it's a PCI XHCI, yes, but that means the problem is likely to be in PCIe host bridge
<arnd> possibly the same DMA ranges issue that you had with MMC
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<arnd> it's clearly hcd->driver->reset() failing in usb_add_hcd(), but I'm not sure which function that points at
<ajb-linaro> [ 3.660627] brcm-pcie fd500000.pcie: host bridge /scb/pcie@7d500000 ranges:
<ajb-linaro> [ 3.676293] brcm-pcie fd500000.pcie: MEM 0x0600000000..0x0603ffffff -> 0x00f8000000
<ajb-linaro> [ 3.667043] brcm-pcie fd500000.pcie: No bus range found for /scb/pcie@7d500000, using [bus 00-ff]
<ajb-linaro> [ 3.684571] brcm-pcie fd500000.pcie: IB MEM 0x0000000000..0x01ffffffff -> 0x0400000000
<ajb-linaro> [ 3.757060] brcm-pcie fd500000.pcie: link up, 5.0 GT/s PCIe x1 (SSC)
<ajb-linaro> [ 3.763207] brcm-pcie fd500000.pcie: PCI host bridge to bus 0000:00
<ajb-linaro> goes looking for magic numbers
<ajb-linaro> arnd: I am at least I think basing the DT on what I get from the VC4 firmware now
<arnd> nsaenz added the PCIe host in commit d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller"), with the dma-ranges pointing to a 3GB DMA area, but that is different from the 1GB area of the mmc node
<ajb-linaro> (although possibly it needs overlays on the sdcard?)
<arnd> I don't know what the boot flow is, I think the original loader expects a dts file to be on the boot file system, and then it patches it according to what it knows about the SoC
<arnd> ajb-linaro: where to you get the dtb from, do you load that together with u-boot over tftp?
<ajb-linaro> arnd: it's what u-boot gets passed (and does seem valid)
<ajb-linaro> fdt addr ${fdt_addr}
<ajb-linaro> fdt move ${fdt_addr} ${fdt_loadaddr}
<arnd> ok
<ajb-linaro> fdt addr ${fdt_loadaddr}
<ajb-linaro> fdt resize 0x200000
<ajb-linaro> was the hoop I jumped through as I couldn't resize in place
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<ajb-linaro> arnd: but the /boot/firmware/overlays directory is empty in this build which makes be wonder if it should be populated so the GPU firmware can do its' thing
<arnd> ajb-linaro: can you "fdt print /scb/pcie@7d500000"? (I hope I remebered that syntax right)
<arnd> ajb-linaro: ah, so that shows an 8GB dma-ranges area in high addresses, not the addresses from the dtb we ship with the kernel
<ajb-linaro> arnd: ok I'm going to try updating the overlays from https://github.com/raspberrypi/firmware/tree/master/boot and see if it changes the DT at all
<nsaenz> arnd, ajb-linaro the rpi-firmware will change dma-ranges depending on the SoC revision.
<nsaenz> Older revisions had a HW bug that didn't allow for PCI DMA on addresses higher than 3GB.
<nsaenz> ajb-linaro, in order for XHCI's firmware to be properly loaded you need 'drivers/reset/reset-raspberrypi.c'.
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<ajb-linaro> nsaenz: yeah that was in both the linux-5.14.y branch and the rpi-5.14.y I've just switched too
<ajb-linaro> nsaenz: is that dma tweaking internal to the firmware or reliant on the overlays directory?
* ajb-linaro is fairly sure his revision is the most recent
<ajb-linaro> RPI 4 Model B (0xd03114) according to u-boot
<nsaenz> ajb-linaro, it's internal to the firmware, no overlay required. The patching will happen if it finds a dt alias for 'pcie0' (which should be there by default).
<nsaenz> ajb-linaro, BTW, is USB working in u-boot?
<ajb-linaro> nsaenz: hmm how would I test that? The u-boot splash screen certainly says it detects an USB XHCI 1.0 and finds devices on it. But the booting I don't think uses the USB (reads SDcard and boots via Ethernet which I think is on the PCIe)
<nsaenz> ajb-linaro, u-boot being able to see devices is good enough, ETH is not under PCIe BTW, it's a memory mapped device. Please make sure you have the latest firmware (as in start4.elf in the boot partition) and also the latest version of the first stage bootloader/usb FW (see https://www.raspberrypi.com/documentation/computers/raspberry-pi.html#raspberry-pi-4-boot-eeprom)
<nsaenz> Also, What configuration are you using to build your kernel?
<vireshk> maz, please see if you can give this another review: https://lists.oasis-open.org/archives/virtio-dev/202110/msg00117.html .. I have made several modifications based on your earlier review. Thanks.
<ajb-linaro> nsaenz: it was a custom one but while debugging I've switched to bcm2711_defconfig with mod2yesconfig
<nsaenz> ajb-linaro, that looks correct. There was a bug (which was solved on newer RPI-FW versions IIRC) where triggering an USB FW load twice, happens through reset-raspberrypi.c in u-boot *and* linux, would break. So please make sure you're updated. Another test would be to bypass u-boot (it's easy to do in config.txt) and see if that makes USB probe correctly.
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<maz> vireshk: I'll try, but my time is severely constraint at the moment (tons of other patches to review, $WORK, plus a number of other unrelated things).
<vireshk> maz, okay. Thanks.
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<j`ey> geertu: why find_all_cmd for SCHEMA/CHKDT but not yamllint?
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<geertu> j`ey: Because you want to check the examples in other bindings, as some parts in the examples may match the specified bindings
<geertu> (that was a comment from Rob on v1)
<j`ey> geertu: aww ok. it makes it faster for me, but it still takes 1min10s
<geertu> j`ey: Yeah, we need ccache for binding and dtb validation ;-)
<geertu> j`ey: there's also a 25s or something python startup penalty.
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<j`ey> I think 10s on your machine is pretty reasonable, I just happen to be using an rpi for whatever reason
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