ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<j`ey> broonie: is everything in regmap cached by default, unless it's volatile? (volatile_reg func / volatile_table)
<j`ey> Oh I see you need to set cache_type in regmap_config
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<rfried> I'm Trying to match between Arch Timer DTS defines and ARM documentation (AARCH64 Programmer's Guides Generic Timer).
<rfried> There are currently 5 PPI IRQs defined on master branch, against 7 defined in documentation. I'm having difficulty mapping between the kernel and doc.
<rfried> The docs states: EL1 physical timer, EL1 virtual timer, Non-secure EL2 physical timer, Non-secure EL2 virtual timer, EL3 physical timer, Secure EL2 physical timer, Secure EL2 virtual timer
<rfried> Documentation/devicetree/bindings/timer/arm,arch_timer.yaml states:
<rfried> secure timer irq, non-secure timer irq, virtual timer irq, hypervisor timer irq, hypervisor virtual timer irq
<rfried> I assume the last two in ARM specs doesn't exist in dts, but still, I'm not certain about the rest.
<j`ey> EL3 doesn't exist in the dts I believe
<j`ey> oh wait, is that the secure timer maybe? Im not sure either
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