whitequark changed the topic of #amaranth-lang to: Amaranth hardware definition language · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang
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<lofty> Abhishek_: if you're in a situation where you can't use amaranth.sim instead, then `from amaranth.back import verilog` and export the design to Verilog using `verilog.convert`
<_whitenotifier-7> [amaranth] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://github.com/amaranth-lang/amaranth/pull/644
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<_whitenotifier-7> [amaranth] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://github.com/amaranth-lang/amaranth/pull/644
<_whitenotifier-7> [amaranth] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://github.com/amaranth-lang/amaranth/pull/644
<_whitenotifier-7> [amaranth] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://github.com/amaranth-lang/amaranth/pull/644
<_whitenotifier-7> [amaranth] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://github.com/amaranth-lang/amaranth/pull/644