00:24 <_whitenotifier-8> [YoWASP/nextpnr] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/Jy9EN

00:24 <_whitenotifier-8> [YoWASP/nextpnr] whitequark a606274 - Update dependencies.

03:19 <d1b2> <marble> I formally verified the blink module https://github.com/cyber-murmel/chubby-hat-nmigen-examples/tree/main/blink

03:40 <agg> marble: neat! any reason you have sync on L52 but comb on L61, and add the blink_out Covers in all three cases?

03:40 <agg> i don't know anything about it so just wondering

03:41 <agg> (I would have thought having Cover on L45/46 would always apply, so not needed again in L57/66?)

03:41 <d1b2> <marble> Ah, no. Must be a leftover from when i was trying to find out what the right option is ^^ Thanks for poiting it out

03:50 <d1b2> <marble> I also don't know for sure about the covers.

12:12 <d1b2> <marble> ahlol... https://github.com/amaranth-lang/amaranth/issues/484#issuecomment-679174119 I did just that... Is there an "official" way to perfoem FV on an module without manually calling sby?

12:28 <d1b2> <286Tech> @marble Nice! One suggestion though: I would always put brackets around statements that have the ~ symbol like you have here: https://github.com/cyber-murmel/chubby-hat-nmigen-examples/blob/main/blink/blink.py#L62

12:28 <d1b2> <286Tech> Or you could just remove the ~ and replace the == with !=

16:58 <_whitenotifier-8> [amaranth] CoreRasurae commented on issue #672: Amaranth FSM does not allow asynchronous reset - https://git.io/Jy550

21:41 <d1b2> <286Tech> Hmm, if I add my CPU, I-mem, D-mem and arbiter to a top module, then everything works fine. But if I put the same "code" in a class that derives from Elaboratable and add that to the top module, then yosys optimizes everything away.

21:41 <d1b2> <286Tech> Oh and happy new year to all who are in a different time zone! 😄

22:19 <d1b2> <286Tech> Ok, dumb mistake...

22:19 <d1b2> <286Tech> My new years resolution is to make less of these silly mistakes 😄