ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<corecode> i wonder what this is about:
<corecode> chip = pytrellis.Chip(dev_names[args.device])
<corecode> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
<corecode> RuntimeError: No such node (row_bias)
<corecode>
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<lofty> corecode: have you updated your prjtrellis-db?
<lofty> That sounds to me like libtrellis and prjtrellis-db aren't in sync
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<corecode> thanks
<corecode> that might be it
<corecode> i'm so confused why arch has prjtrellis in extra, but nextpnr is in aur
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<xiretza[m]> there used to be a non-git nextpnr in the repos
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<corecode> what happened?
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<so-offish> Does yosys not support functions that return a real value?
<so-offish> module func_real_test();
<so-offish> localparam real a_value = rpow2(10.0);
<so-offish> function real rpow2;
<so-offish> rpow2 = inval * inval;
<so-offish> input real inval;
<so-offish> endfunction // rpow2
<so-offish>
<so-offish>
<so-offish> initial begin
<so-offish> $display("rpow2(10.0):%f",a_value);
<so-offish> end
<so-offish> endmodule
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<jleightcap> is there a recommended method for distributing .ys scripts?
<jleightcap> e.g. the same script with a different set of HDL input and -I dirs
<jleightcap> rather than hard-coding inputs at the head of a `read_verilog` line
<jleightcap> maybe best to just use TCL in this case, although i'm not familiar :-)
<lofty> jleightcap: yosys scripts passed with `-s` are processed after files on the command line
<lofty> so, instead of having `read_verilog` lines in your script, pass those files on the command line
<jleightcap> ah yeah! that worked great, the only wrinkle i had was passing `-I` dirs for includes
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<jleightcap> maybe like: `yosys -s synth.ys -p 'read_verilog -Ifoo $SRC'`
<jleightcap> but the script processes before the -p command it seems
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