ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<so-offish> Got confirmation - there's no DRP on the PLLs of the ECP5.
<gatecat> it's particularly weird when basically any other Lattice FPGA lets you do that too....
<so-offish> Right? Found out how to do it with their other parts; IDK what happened with the ECP5.
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<so-offish> OK! I have a Yosys question
<so-offish> localparam _STYLE = (STYLE == "") ? "block_ram" : STYLE;
<so-offish> /* syn_ramstyle = _STYLE */ reg [WIDTH-1:0] ram [0:SIZE-1];
<so-offish> Does this "style" of using a localparam to then fill in a comment work in Yosys, and how would I check? I dumped the design in Yosys, but where would I check that the localparam was "in effect" (because I don't see it) - does it show up in an attribute for that block?
<so-offish> Shoot it might have just been that it should be this: /* synthesis syn_ramstyle = _STYLE */ reg [WIDTH-1:0] ram [0:SIZE-1]; \
<so-offish> Ahem. I was too early - after synth_ecp5, it shows up just fine. I guess it's processed in that stage, not earlier. Sorry about that; was confused
<so-offish> Yup that appears to work.