ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<lamp> so i can't clearly figure this out from the documentation, other than the old wq issue mentioning it without reference to arch... does ice40 support asymmetric write/read widths in inferred BRAM
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<mwk> xit should, with the new inference code
<lamp> cool!
<lamp> to save myself the time, do you specify the word width as the larger one when writing the actual array
<mwk> the array should have the narrowest width you want to use
<mwk> we actually have a doc with aptterns that are supported
<mwk> moment
<tpb> Title: Memory Inference Patterns - Google Docs (at docs.google.com)
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<lamp> thank you
<lamp> Is there a reason there isn't a persistent place for this? Wil lthere be?