ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<SeekerOfKnowlege> Hello I was wondering if yosys has support for all xilinx spartan 7 fpgas. Also where would the supported architectures be in the yosys documentation?
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<lofty> Well, the seeker of knowledge will now never know
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<pepijndevos[m]> Catherine: does this look like a yowasp, wasmtime, nextpnr, or apicula bug to you? https://github.com/YosysHQ/apicula/runs/7595136093?check_suite_focus=true#step:6:49677
<whitequark> will look in a few hours, ping me if i forget
<pepijndevos[m]> <SeekerOfKnowlege> "Hello I was wondering if yosys..." <- relatedly... project x-ray isn't in the wiki yet https://github.com/YosysHQ/yosys/wiki/FPGA-family-feature-matrix/
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<ikskuh> heya! o/
<ikskuh> is there a example of how to use ecp5 IO primitives with yosys directly? instead of inferring them? such as open collector/push-pull/...
<rowang077[m]> ikskuh: I'm not sure if they are inferred. I don't think so.
<rowang077[m]> You can manually instantiate them using the primitive outlined in file:///home/rowan.goemans/Downloads/FPGALibrariesReferenceGuide33.pdf
<rowang077[m]> Ah wrong link...
<ikskuh> ah thanks <3
<ikskuh> i'll check it out
<ikskuh> so what i wanna do is use the OBZ primitive
<ikskuh> but how do i connect it to an output?
<rowang077[m]> The OBZ primitive is not available for the ECP5 FPGA
<rowang077[m]> ikskuh: See the Architectures supported. ECP5 has something similar though the BB primitive
<rowang077[m]> Or BBPD/BBPU depending on your exact use case
<rowang077[m]> Scratch that you are right this is available for the ECP5
<rowang077[m]> I was confused because I assumed bidrectionality.
<rowang077[m]> Anyway what you want to do is instantiate the OBZ primitive connect O to the wire that maps to your FPGA output. Connect I to the driver and connect ~OutputEnable
<rowang077[m]> to T
<rowang077[m]> So the truth table in the document
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