ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<Guest97> Trying to use visual studio to write  HDL/verilog
<Guest97> followed all steps on the website to install yosys on windows
<Guest97> but how do i make a project and simulate the verilog code
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