sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<dh`> yeah, same here
<dh`> possible that gas has changed in the meantime, or that it was mips or arm rather than riscv, or...
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<bjdooks> finally
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<pabs3> RVV 1.0
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<pierce> <pabs3> "RVV 1.0" <- 🀞🏻 0.7.1 follows shortly thereafter
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<palmer> pierce: I just asked for a re-spin of the v-0.7.1/thead stuff to match up with all the new stuff we merged
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<palmer> IDK if Heiko or Guo or someone has time to do it, but there's a bunch of new v-9.7.1 stuff showing up so hopefully we can get it sorted out
<conchuod> Heiko already said he would πŸ‘
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<pierce> palmer: I’m not a religious person, but god bless you
<palmer> pierce: the best way to help is to go review patches... ;)
<muurkha> the highest form of praise
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<conchuod> not even review, Tested-bys are fantastic too
<palmer> ya, particularly if it's got some sort of HW related stuff going on
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<conchuod> palmer: btw, is it required to add a new extension into the hwprobe stuff to get it merged, or is that up to whoever cares?
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<palmer> I don't think we should require it
<conchuod> πŸ‘
<conchuod> palmer: you planning on doing a sweep through some more for-next material at some point still for 6.5? seems to be fair few patches adding new extension bits that are ~ready
<palmer> Ya, but feel free to point me at stuff
<conchuod> palmer: Sure, tomorrow ;)
<pierce> <conchuod> "not even review, Tested-bys..." <- Not a bad idea, I got 3 different SoCs I could test vectors on, they should be the same but who knows!
<pierce> Would kernelnewbies have a guide on how bozos like me could test to Linux’s standards?
<conchuod> pfft
<conchuod> Just do whatever your usecases are & reply with a "Tested-by: Pierce McBride <piece@mcbride.net>" or w/e your name/email is.
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