sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<gurki> thats mostly a collection of guesses and wishes :s
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<solrize> yep, 2x die shrink lol
<jrtc27> only die shrink will be from losing features
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<muurkha> could happen
<jrtc27> I mean genuinely
<jrtc27> where does that savings come from?
<jrtc27> x86->arm is non-crazy decode
<jrtc27> and weirdo legacy crud
<jrtc27> what does arm have that riscv doesn't that adds significant area?
<jrtc27> (that isn't important for a modern high-perf core?)
<muurkha> I haven't ever written a core for either one
<muurkha> so probably this is dumb, but
<muurkha> "modern high-performance" probably implies 64-bit, which means aarch64, which means no compressed instructions
<muurkha> in RAM anyway
<muurkha> it would be kind of awesome if someone built a compressed icache for aarch64 using a C-like approach, but AFAIK nobody has
<muurkha> plausibly you can get by without op fusion for longer with RV64 than for aarch64, but you definitely want it pretty early on
<muurkha> but like I said I don't know much of anything so I could have all of that backwards
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<dh`> jrtc27: a java bytecode mode?
<dh`> (for example. arm seems to have a lot of things like that)
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<jrtc27> that's been dead for years
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<jrtc27> good luck finding a modern high-perf arm core with that
<dh`> enclaves? (which I can't remember what arm calls them)
<dh`> idk, it seems like there's been a long parade of questionable features over the last maybe ten years and arm has nearly as many as x86
<jrtc27> secure world and realms
<jrtc27> which riscv is adding its equivalent of (:
<jrtc27> ah trustzone
<jrtc27> that's the word
<dh`> right, that sounds right
<dh`> anyway it seems like the arm architecture docs being two orders of magnitude larger than the riscv architecture docs is not _just_ because the riscv ones are sometimes too abbreviated and the arm ones badly written and often broadly redundant
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<drewfustini> Anyone else coming to Barcelona for the Summit!
<drewfustini> *?
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<Esmil> drewfustini: yes!
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<Tenkawa> I wish I could.. closest I'm going to be is vacation in France in October heheh
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<Tenkawa> Esmil: got my Star64 running Debian now with LLVM-15.. Know if anyone has started work on migrating its needed dts changes/etc?
<Tenkawa> Runs ok on the 5.15 kernel FishWaldo worked on for it from the vendor source however was just curious...
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<prabhakarlad> conchuod: I haven't heard back anything from arnd for the dma unification series (https://www.spinics.net/lists/linux-m68k/msg22199.html). This has been blocking the RZ/Five upstreaming activity now from quite sometime. Should I go back to function pointer way (ie v7 series) and post the patches?
<conchuod> Well I guess arnd will probably see the pokes here!
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<conchuod> I guess he has just been busy with other things, cos I don't recall any objections to arnds series.
<prabhakarlad> okie, I'll wait for arnd to respond on this.
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