sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<Stat_headcrabed> conchuod: PMIC patch1,2 applied
<Stat_headcrabed> 3 reviewed but not applied yet
<conchuod> Stat_headcrabed: So the binding is in?
<Stat_headcrabed> Yep
<conchuod> Cool, thanks!
<Stat_headcrabed> :3
<Esmil> Stat_headcrabed: nice :)
<Stat_headcrabed> Btw, for GPIO part, rewriting a new driver seems even easier than using existing driver...
<Stat_headcrabed> I think I'll give up this
<Stat_headcrabed> Its logit is soooooo strange
<Stat_headcrabed> logic*
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<muurkha> guix is down to a 357-byte bootstrap seed, plus a kernel: https://guix.gnu.org/en/blog/2023/the-full-source-bootstrap-building-from-source-all-the-way-down/
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<vagrantc> muurkha: and a guile ...
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<muurkha> no, the guile is now built from source as part of the process
<muurkha> that was a huge difficulty because of Scheme's macro system
<vagrantc> muurkha: not according to the link you posted ... see "next steps"
<muurkha> oh, shit, you're right
<muurkha> thanks
<vagrantc> still really amazing, and riscv is in progress... :)
<muurkha> RISC-V has shipped over a billion units I think
<la_mettrie> hard to believe :o
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