sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<Galihom> Hi
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<pabs3> welcome Galihom
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<conchuod> Stat_headcrabes: did you get your stuff tested then?
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<drewfustini> For linux on rv64gc, anyone know if it is bad idea to have a PER_CPU variable that is u32? The data I need to store is only 32 bits but I'm not sure if less than cache line is bad idea.
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